公开(公告)号：US10061735B2

公开(公告)日：2018-08-28

申请号：US15059227

申请日：2016-03-02

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Wei-Yu Wang ,  Yu-Chung Wei ,  Yinglien Cheng

IPC: G06F13/36 ,  G06F13/38 ,  G06F13/40 ,  G06F13/42 ,  G06F11/30

CPC classification number: G06F13/4072 ,  G06F13/4282 ,  G06F13/4295 ,  G06F2213/0042

Abstract: A USB chipset coupled between a first device and a second device is provided. A data processing unit is coupled to the first device and generates a plurality of transmission information according to first information provided by the first device. A transmitting unit is coupled to the data processing unit to transmit the transmission information to the second device and includes a converting module, a first output driving module, a second output driving module, and a transmitting-terminal selecting module. The converting module is coupled to the data processing unit to receive the transmission information in parallel and serially outputs the transmission information. The first output driving module is coupled to a first pin set. The second output driving module is coupled to a second pin set. The transmitting-terminal selecting module is coupled between the converting module and the first and second output driving modules.

公开(公告)号：US10606788B2

公开(公告)日：2020-03-31

申请号：US16050103

申请日：2018-07-31

Applicant: VIA TECHNOLOGIES, INC.

Inventor： Wei-Yu Wang ,  Yu-Chung Wei ,  Yinglien Cheng

IPC: G06F13/38 ,  G06F13/40 ,  G06F13/42

Abstract: The USB chipset including a data processing unit, a transmitting unit, a first pin set and a second pin set is provided. The data processing unit generates a plurality of transmission information according to first information provided by a first device. The transmitting unit processes the transmission information to generate an output signal. The first pin set is configured to transmit the output signal to a second device. The second pin set is configured to transmit the output signal to the second device. When the first pin set transmits the output signal to the second device, the second pin set does not transmit the output signal to the second device. When the second pin set transmits the output signal to the second device, the first pin set does not transmit the output signal to the second device.

公开(公告)号：US20170070373A1

公开(公告)日：2017-03-09

申请号：US14990799

申请日：2016-01-08

Applicant: VIA Technologies, Inc.

Inventor： Yu-Chung Wei

IPC: H04L25/03 ,  H04L25/06

CPC classification number: H04L25/063 ,  H04L25/03878

Abstract: A slicer apparatus and a calibration method thereof are provided. A differential reference signal pair used for performing an error slicing operation is adjusted, so as to calibrate an offset voltage of the slicer apparatus.

Abstract translation: 提供了一种切片机及其校正方法。 调整用于执行误差分割操作的差分参考信号对，以校准限幅器装置的偏移电压。

公开(公告)号：US09654315B2

公开(公告)日：2017-05-16

申请号：US14990799

申请日：2016-01-08

Applicant: VIA Technologies, Inc.

Inventor： Yu-Chung Wei

IPC: H04L25/03 ,  H04L25/06

CPC classification number: H04L25/063 ,  H04L25/03878

Abstract: A slicer apparatus and a calibration method thereof are provided. A differential reference signal pair used for performing an error slicing operation is adjusted, so as to calibrate an offset voltage of the slicer apparatus.

公开(公告)号：US10305462B1

公开(公告)日：2019-05-28

申请号：US15921682

申请日：2018-03-15

Applicant: VIA Technologies, Inc.

Inventor： Wei-Yu Wang ,  Yu-Chung Wei

IPC: H03F3/195 ,  H03F3/45 ,  H03K5/22 ,  H03K5/24

Abstract: A high speed internal hysteresis comparator is provided. Impedance supply units are disposed at control terminals of transistors of an active load of a differential amplifier of the high-speed hysteresis comparator, such that a gain when the transistors operate in an active region and a responding speed of the high-speed hysteresis comparator are increased.