USB chipset
    1.
    发明授权

    公开(公告)号:US10061735B2

    公开(公告)日:2018-08-28

    申请号:US15059227

    申请日:2016-03-02

    CPC classification number: G06F13/4072 G06F13/4282 G06F13/4295 G06F2213/0042

    Abstract: A USB chipset coupled between a first device and a second device is provided. A data processing unit is coupled to the first device and generates a plurality of transmission information according to first information provided by the first device. A transmitting unit is coupled to the data processing unit to transmit the transmission information to the second device and includes a converting module, a first output driving module, a second output driving module, and a transmitting-terminal selecting module. The converting module is coupled to the data processing unit to receive the transmission information in parallel and serially outputs the transmission information. The first output driving module is coupled to a first pin set. The second output driving module is coupled to a second pin set. The transmitting-terminal selecting module is coupled between the converting module and the first and second output driving modules.

    USB chipset
    2.
    发明授权

    公开(公告)号:US10606788B2

    公开(公告)日:2020-03-31

    申请号:US16050103

    申请日:2018-07-31

    Abstract: The USB chipset including a data processing unit, a transmitting unit, a first pin set and a second pin set is provided. The data processing unit generates a plurality of transmission information according to first information provided by a first device. The transmitting unit processes the transmission information to generate an output signal. The first pin set is configured to transmit the output signal to a second device. The second pin set is configured to transmit the output signal to the second device. When the first pin set transmits the output signal to the second device, the second pin set does not transmit the output signal to the second device. When the second pin set transmits the output signal to the second device, the first pin set does not transmit the output signal to the second device.

    TRANSMISSION CIRCUIT FOR I/O INTERFACE AND SIGNAL TRANSMISSION METHOD THEREOF
    3.
    发明申请
    TRANSMISSION CIRCUIT FOR I/O INTERFACE AND SIGNAL TRANSMISSION METHOD THEREOF 有权
    用于I / O接口和信号传输方法的传输电路

    公开(公告)号:US20140086297A1

    公开(公告)日:2014-03-27

    申请号:US14020903

    申请日:2013-09-09

    CPC classification number: H04L25/03878 H04L25/03885

    Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

    Abstract translation: 提供了包括均衡器电路,限幅电路,信号检测电路和控制电路的发送电路。 均衡器电路根据预置状态对输入信号进行均衡操作,以输出对应于每个预置状态的均衡信号。 限幅电路对均衡信号进行切片动作,输出切片信号。 信号检测电路检测并比较均衡信号和限幅信号,并相应地将均衡器电路调整为预设状态之一。 控制电路接收对应于每个预设状态的切片信号,将与每个预设状态相对应的切片信号与多个信号图案进行比较以产生比较结果,并根据比较结果选择一个预置状态,使得 控制电路使均衡器电路根据所选择的预设状态进行均衡操作。

    High-speed internal hysteresis comparator

    公开(公告)号:US10305462B1

    公开(公告)日:2019-05-28

    申请号:US15921682

    申请日:2018-03-15

    Abstract: A high speed internal hysteresis comparator is provided. Impedance supply units are disposed at control terminals of transistors of an active load of a differential amplifier of the high-speed hysteresis comparator, such that a gain when the transistors operate in an active region and a responding speed of the high-speed hysteresis comparator are increased.

    Circuitry and method for driving laser with temperature compensation
    5.
    发明授权
    Circuitry and method for driving laser with temperature compensation 有权
    用温度补偿驱动激光器的电路和方法

    公开(公告)号:US09031108B2

    公开(公告)日:2015-05-12

    申请号:US14338643

    申请日:2014-07-23

    CPC classification number: H01S5/06804 H01S5/0427 H01S5/183

    Abstract: A temperature-compensated laser driving circuit for driving a laser component is provided. The temperature-compensated laser driving circuit includes: a temperature compensation circuit, configured to generate a second current based on a first current and a temperature-independent current; and a modulation current generating circuit, configured to generate a modulation current based on the second current, and calibrate optical power output of the laser component based on the modulation current. The first current is proportional to the absolute temperature. The second current and the first current have a slope relative to the absolute temperature respectively, and the slope of the second current relative to the absolute temperature is larger than of the slope of the first current relative to the absolute temperature.

    Abstract translation: 提供了用于驱动激光部件的温度补偿激光驱动电路。 温度补偿激光器驱动电路包括:温度补偿电路,被配置为基于第一电流和与温度无关的电流产生第二电流; 以及调制电流产生电路,被配置为基于所述第二电流产生调制电流,并且基于所述调制电流来校准所述激光器部件的光功率输出。 第一个电流与绝对温度成正比。 第二电流和第一电流分别具有相对于绝对温度的斜率,并且第二电流相对于绝对温度的斜率大于第一电流相对于绝对温度的斜率。

    Phase detecting apparatus and phase adjusting method
    6.
    发明授权
    Phase detecting apparatus and phase adjusting method 有权
    相位检测装置及相位调整方法

    公开(公告)号:US09419783B1

    公开(公告)日:2016-08-16

    申请号:US14735156

    申请日:2015-06-10

    CPC classification number: H04L7/033 H03L7/0807 H03L7/087 H03L7/091 H04W56/0065

    Abstract: A phase detecting apparatus and a phase adjusting method are provided. Determine whether to output a phase adjusting control signal according to a first data sampling value, a second data sampling value and a third data sampling value that are successively generated, so as to adjust a phase of a sampling clock signal used to sample a data signal.

    Abstract translation: 提供了相位检测装置和相位调整方法。 根据连续产生的第一数据采样值,第二数据采样值和第三数据采样值来确定是否输出相位调整控制信号,以便调整用于采样数据信号的采样时钟信号的相位 。

    Optical transceiver modules, optical transmission devices, and optical transmission methods
    7.
    发明授权
    Optical transceiver modules, optical transmission devices, and optical transmission methods 有权
    光收发模块,光传输设备和光传输方式

    公开(公告)号:US09397752B2

    公开(公告)日:2016-07-19

    申请号:US14450417

    申请日:2014-08-04

    CPC classification number: H04B10/2575 H04B10/40

    Abstract: An optical transceiver module coupled to a device is provided. The optical transceiver module includes an electronic signal transmitting terminal coupled to a receiving terminal of the device, an electronic signal receiving terminal coupled to a transmitting terminal of the device, an optical signal receiving terminal coupled to the electronic signal transmitting terminal, and an optical signal transmitting terminal coupled to the electronic signal receiving terminal. When the optical transceiver module is at an normal operation state and the electronic signal receiving terminal does not receive any electronic signal over a first predetermined time period, the optical transceiver module enters a idle detection state to make the electronic signal transmitting terminal to perform a receiver termination detection to the device to determine whether the device is coupled to the optical transceiver module. At the idle detection state, the optical signal transmitting terminal transmits the optical signal continuously.

    Abstract translation: 提供耦合到设备的光收发器模块。 光收发器模块包括耦合到设备的接收终端的电子信号发送终端,耦合到设备的发送终端的电子信号接收终端,耦合到电子信号发送终端的光信号接收终端和光信号 耦合到电子信号接收终端的发射终端。 当光收发模块处于正常工作状态并且电子信号接收终端在第一预定时间段内没有接收任何电子信号时,光收发模块进入空闲检测状态,使得电子信号发送终端执行接收机 终端检测到设备以确定设备是否耦合到光收发模块。 在空闲检测状态下,光信号发送端连续发送光信号。

    Transmission circuit for I/O interface and signal transmission method thereof
    8.
    发明授权
    Transmission circuit for I/O interface and signal transmission method thereof 有权
    用于I / O接口的传输电路及其信号传输方法

    公开(公告)号:US09215111B2

    公开(公告)日:2015-12-15

    申请号:US14020903

    申请日:2013-09-09

    CPC classification number: H04L25/03878 H04L25/03885

    Abstract: A transmission circuit including an equalizer circuit, a slicer circuit, a signal detection circuit, and a control circuit is provided. The equalizer circuit performs an equalizing operation on an input signal according to preset states to output an equalizing signal corresponding to each preset state. The slicer circuit performs a slicing operation on the equalizing signal to output a slicing signal. The signal detection circuit detects and compares the equalizing signal and the slicing signal and accordingly adjusts the equalizer circuit to one of the preset states. The control circuit receives the slicing signal corresponding to each preset state, compares the slicing signal corresponding to each preset state with a plurality of signal patterns to generate a comparison result, and selects one of the preset states according to the comparison result, such that the control circuit let the equalizer circuit perform the equalizing operation according to the selected preset state.

    Abstract translation: 提供了包括均衡器电路,限幅电路,信号检测电路和控制电路的发送电路。 均衡器电路根据预置状态对输入信号进行均衡操作,以输出对应于每个预置状态的均衡信号。 限幅电路对均衡信号进行切片动作,输出切片信号。 信号检测电路检测并比较均衡信号和限幅信号,并相应地将均衡器电路调整为预设状态之一。 控制电路接收对应于每个预设状态的切片信号,将与每个预设状态相对应的切片信号与多个信号图案进行比较以产生比较结果,并根据比较结果选择一个预置状态,使得 控制电路使均衡器电路根据所选择的预设状态进行均衡操作。

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