公开(公告)号：US10715131B2

公开(公告)日：2020-07-14

申请号：US15574502

申请日：2016-04-11

申请人： VISIC TECHNOLOGIES LTD.

发明人： Gregory Bunin ,  David Shapiro

IPC分类号： H03K17/082 ,  H03K17/10 ,  H03K17/567 ,  H03K17/687 ,  H03K17/693 ,  H03K17/74

摘要： A switching power device (100) is provided which comprises: a normally-ON transistor (12), a normally-OFF metal-oxide-semiconductor field-effect transistor (MOSFET) (14), the normally-OFF MOSFET (14) being connected in series to a source terminal (12S) of the normally-ON transistor (12), and a driver (16) connected to and arranged to drive a gate terminal (12G) of the normally-ON transistor (12). A switching transistor (28) can then be positioned between the source terminal (12S) of the normally-ON transistor (12) and a common connection (30) of the driver (16) to protect the switching power device (100) from deleterious over-voltage and over-current spikes.

公开(公告)号：US11978792B2

公开(公告)日：2024-05-07

申请号：US14761010

申请日：2014-01-15

申请人： VISIC TECHNOLOGIES LTD.

发明人： Gregory Bunin ,  Tamara Baksht

IPC分类号： H01L29/778 ,  H01L23/535 ,  H01L29/417 ,  H01L29/20 ,  H01L29/423

CPC分类号： H01L29/7788 ,  H01L23/535 ,  H01L29/417 ,  H01L29/7783 ,  H01L29/7786 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L2924/0002 ,  H01L2924/0002 ,  H01L2924/00

摘要： A field effect transistor (FET) includes a plurality of substantially parallel conductive channels and at least one electrically conducting plug to travers and form an ohmic connection with at least two of the plurality of conductive channels.

公开(公告)号：US10298227B2

公开(公告)日：2019-05-21

申请号：US15706121

申请日：2017-09-15

申请人： VISIC TECHNOLOGIES LTD.

发明人： Gregory Bunin ,  David Shapiro ,  Lev Stessin

IPC分类号： H03K17/30 ,  H03K17/16 ,  H03K17/687 ,  H03K3/01 ,  H03K17/10 ,  H03K17/14 ,  H03K7/08 ,  H01L29/778 ,  H01L29/10 ,  H01L29/20

摘要： An apparatus includes a circuitry to perform a high current and/or a high voltage switching. The circuitry includes a first Gallium Nitride (GaN) on a silicon (Si) substrate lateral field effect transistor. A source terminal of the first GaN lateral field effect transistor on the Si substrate includes an electrical connection to backside of P-type Si substrate through a high voltage isolated resistor that is coupled to a source terminal or a second resistor that is operably coupled to a drain terminal and a substrate terminal. The high voltage isolated resistor and the second resistor cause to a leakage current from the drain terminal to the source terminal via a buffer layer. The leakage current equalizes the voltage drop on the first GaN lateral field effect transistor on the Si substrate to a voltage drop on a serially connected second GaN lateral field effect transistor on the Si substrate.

公开(公告)号：US10930737B2

公开(公告)日：2021-02-23

申请号：US16462645

申请日：2017-11-23

申请人： VISIC TECHNOLOGIES LTD.

发明人： Gregory Bunin ,  Ivan Fedorov ,  Yulia Roiter

IPC分类号： H01L29/06 ,  H01L23/522 ,  H01L29/20 ,  H01L29/40 ,  H01L29/417 ,  H01L29/778 ,  H01L29/43 ,  H01L29/423

摘要： A GaN field effect transistor (FET) including a plurality of transistor cells. A gate metal layer of a transistor cell includes a gate-drain overhang (width 0.2 um to 2.5 um) and a gate-source overhang (width 0.3 um to 1 um), and a widening at each narrow edge of the transistor cell, wherein the width of the widening of gate metal layer (150) is of 2-5 um. A metal (1) layer of the transistor sell extends beyond metal (0) layer. A last metal layer includes a drain plate and a source plate, each having a trapezoid form. More than two vias are located at a widening for connecting the gate metal layer to the gate bus. More than six vias distributed along the longitudinal dimension of the transistor cell connect metal (1) layer to metal (0) layer. A plurality of type 2 vias connect metal (1) layer to the last metal layer.