公开(公告)号：US10061724B2

公开(公告)日：2018-08-28

申请号：US15284413

申请日：2016-10-03

Applicant: VMware, Inc.

Inventor： Bhavesh Davda ,  Benjamin C. Serebrin

IPC: G06F12/0862 ,  G06F13/28 ,  G06F12/1081 ,  G06F12/1027 ,  G06F12/14 ,  G06F9/455

CPC classification number: G06F12/1081 ,  G06F9/45533 ,  G06F12/0862 ,  G06F12/1027 ,  G06F12/145 ,  G06F13/28 ,  G06F2212/1024 ,  G06F2212/151 ,  G06F2212/602 ,  G06F2212/654

Abstract: Latency reduction for direct memory access operations involving address translation is disclosed. Example methods disclosed herein to perform direct memory access (DMA) operations include initializing a ring of descriptors, the descriptors to index respective buffers for storing received data in a first memory. Such example methods also include causing prefetching of a first address translation associated with a second descriptor in the ring of descriptors to be performed after a first DMA operation is performed to store first received data in a first buffer indexed by a first descriptor in the ring of descriptors and before second received data to be stored in the first memory is received, the first address translation being associated with a second DMA operation for storing the second received data in the first memory.

公开(公告)号：US10452559B2

公开(公告)日：2019-10-22

申请号：US15708063

申请日：2017-09-18

Applicant: VMware, Inc.

Inventor： Benjamin C. Serebrin ,  Bhavesh Mehta

IPC: G06F12/1036 ,  G06F12/10

Abstract: In a computer system having virtual machines, one or more unused bits of a guest physical address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.

公开(公告)号：US11093407B2

公开(公告)日：2021-08-17

申请号：US16582204

申请日：2019-09-25

Applicant: VMware, Inc.

Inventor： Benjamin C. Serebrin ,  Bhavesh Mehta

IPC: G06F12/1036 ,  G06F12/10

Abstract: In a computer system having virtual machines, one or more unused bits of a guest physical address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.

公开(公告)号：US09519548B2

公开(公告)日：2016-12-13

申请号：US14588594

申请日：2015-01-02

Applicant: VMware, Inc.

Inventor： Benjamin C. Serebrin ,  Bhavesh Mehta

IPC: G06F11/14 ,  G06F12/10 ,  G06F9/455

CPC classification number: G06F11/1451 ,  G06F11/1464 ,  G06F12/1018 ,  G06F12/1027 ,  G06F2009/45583 ,  G06F2201/815 ,  G06F2201/84 ,  G06F2212/651 ,  G06F2212/657

Abstract: One or more unused bits of a virtual address range are allocated for aliasing so that multiple virtually addressed sub-pages can be mapped to a common memory page. When one bit is allocated for aliasing, dirty bit information can be provided at a granularity that is one-half of a memory page. When M bits are allocated for aliasing, dirty bit information can be provided at a granularity that is 1/(2M)-th of a memory page.

Abstract translation: 虚拟地址范围的一个或多个未使用的位被分配用于混叠，使得多个虚拟寻址的子页面可以被映射到公共存储器页面。 当分配一个位用于混叠时，可以以占用存储器页面的一半的粒度来提供脏位信息。 当M位被分配用于混叠时，可以以存储器页面的1 /（2M）的粒度来提供脏位信息。