公开(公告)号：US07761826B1

公开(公告)日：2010-07-20

申请号：US11782619

申请日：2007-07-24

申请人： Venkat Thanvantri ,  Shiva Raja ,  Igor Keller ,  Lizheng Zhang

发明人： Venkat Thanvantri ,  Shiva Raja ,  Igor Keller ,  Lizheng Zhang

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： Method and system for crosstalk analysis relating to a statistical crosstalk path delay model that fits into existing static timing framework with little overhead in performance and capacity. More realistic models or assumptions are utilized rather than the more aggressive and less likely deterministic model.

摘要翻译： 与统计串扰路径延迟模型相关的串扰分析方法和系统，适用于现有的静态时序框架，性能和容量的开销很小。 使用更逼真的模型或假设，而不是更积极和不太可能的确定性模型。

公开(公告)号：US09732611B2

公开(公告)日：2017-08-15

申请号：US14384991

申请日：2012-03-29

申请人： Lizheng Zhang

发明人： Lizheng Zhang

IPC分类号： E21B49/10 ,  E21B47/01 ,  E21B47/09 ,  E21B49/00

CPC分类号： E21B49/10 ,  E21B47/011 ,  E21B47/09 ,  E21B49/005

摘要： Methods and systems for improving operations of a formation tester are disclosed. The formation tester (400) is placed in a wellbore at a location of interest. The formation tester comprises a first isolation pad (402) coupled to a pad carrier (410) and a second isolation pad (404). The first isolation is extendable to substantially seal a probe of the formation tester against a wellbore wall. The first isolation pad is then replaced with the second isolation pad if it is determined that the first isolation pad should be replaced with the second isolation pad.

公开(公告)号：US10209390B2

公开(公告)日：2019-02-19

申请号：US14889977

申请日：2013-08-05

申请人： Wei Zhang ,  Lizheng Zhang ,  Li Gao ,  Burkay Donderici

发明人： Wei Zhang ,  Lizheng Zhang ,  Li Gao ,  Burkay Donderici

IPC分类号： G01V3/38 ,  G01N27/06 ,  G01V3/28 ,  G01N33/28 ,  G01N27/02 ,  G01N27/08 ,  E21B49/08

摘要： An apparatus includes a helical flow tube in a formation testing tool. A current injector injects an electromagnetic current into the flow tube. A receiver coil is positioned to produce a receiver coil signal in response to the electromagnetic current. A processor is coupled to the receiver coil to calculate a conductivity of a fluid flowing through the flow tube based on the receiver coil signal.

公开(公告)号：US20150168582A1

公开(公告)日：2015-06-18

申请号：US14388193

申请日：2012-03-28

申请人： Wei Zhang ,  Lizheng Zhang ,  Li Gao ,  David Earl Ball

发明人： Wei Zhang ,  Lizheng Zhang ,  Li Gao ,  David Earl Ball

IPC分类号： G01V3/02 ,  E21B49/08

CPC分类号： G01V3/02 ,  E21B49/08 ,  G01V3/20

摘要： Disclosed is a downhole fluid resistivity sensor that includes a ceramic cylinder having a fluid-contacting surface, and at least four metal pins that penetrate a wall of the ceramic cylinder at axially-spaced locations. The pins are bonded to the ceramic to form a pressure seal. The sensor may include a circuit that injects current into a fluid via an outer two of the pins, and measures a resulting voltage via an inner two of the pins. The circuit may also provide an indication of fluid resistivity based at least in part on the resulting voltage. At each of the axially-spaced locations, a set of multiple pins may penetrate the wall to contact the fluid at circumferentially-spaced positions. The fluid-contacting surface may be an inner surface or an outer surface of the ceramic cylinder. A downhole fluid resistivity measurement method is also described.

摘要翻译： 公开了一种井下流体电阻率传感器，其包括具有流体接触表面的陶瓷圆筒，以及至少四个在轴向间隔开的位置处穿过陶瓷圆柱壁的金属销。 销钉结合到陶瓷上以形成压力密封。 传感器可以包括经由外部两个引脚将电流注入流体的电路，并且经由内部两个引脚测量所得到的电压。 该电路还可以至少部分地基于所得到的电压来提供流体电阻率的指示。 在每个轴向间隔的位置处，一组多个销可以穿透壁以在周向间隔的位置处接触流体。 流体接触表面可以是陶瓷圆筒的内表面或外表面。 还描述了井下流体电阻率测量方法。

公开(公告)号：US08244491B1

公开(公告)日：2012-08-14

申请号：US12343262

申请日：2008-12-23

申请人： Lizheng Zhang

发明人： Lizheng Zhang

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F2217/10

摘要： A method is provided to evaluate crosstalk effect of aggressor switching upon victim net signal transition time within an integrated circuit comprising: combining a first probability density function (PDF) of first aggressor switching time in response to a first input signal to an aggressor net driver and a second aggressor switching time in response to a second input signal to the aggressor net driver; determining a delay change curve that represents a relationship between delay change of arrival time of a victim net signal transition and relative alignment of the aggressor net driver switching time and a victim net driver switching time; and determining a third PDF of delay change of a transition of the victim net signal based upon the combination and the delay change curve.

摘要翻译： 提供了一种方法来评估攻击者切换对集成电路内的受害者网络信号转换时间的串扰效应，包括：将第一侵入者切换时间的第一概率密度函数（PDF）与响应于侵入者网络驱动器的第一输入信号相结合，以及 响应于对侵略者网络驱动器的第二输入信号的第二侵权者切换时间; 确定延迟变化曲线，其表示受害者网络信号转换的到达时间的延迟变化与侵略者网络驱动器切换时间的相对对准与受害者网络驱动器切换时间之间的关系; 以及基于所述组合和所述延迟变化曲线来确定所述受害者网络信号的转变的延迟变化的第三PDF。

公开(公告)号：US07689954B2

公开(公告)日：2010-03-30

申请号：US11420322

申请日：2006-05-25

申请人： Lizheng Zhang ,  Yuhen Hu ,  Chun-ping Chen

发明人： Lizheng Zhang ,  Yuhen Hu ,  Chun-ping Chen

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F17/504 ,  G06F2217/10 ,  G06F2217/84

摘要： Statistical timing analysis methods for circuits are described which compensate for circuit elements having correlated timing delays with a high degree of computational efficiency. An quadratic timing model is used to represent each delay element along a circuit path, wherein each element's delay has a first-order relationship to local variations and a second-order relationship to global variations. Propagation of the modeled delays through the circuit is efficiently done via straightforward ADD operations where an input propagates through another element in a circuit path, and via a MAX operation (or an approximation thereof) where two or more inputs merge at an intersection. The inputs to the MAX operator can be tested for gaussianity, and can be processed by the MAX operation (or its approximation) if they are substantially gaussian. Otherwise, they may be stored in a tuple for processing at later points along the circuit path.

摘要翻译： 描述了用于补偿具有高计算效率的具有相关定时延迟的电路元件的电路的统计时序分析方法。 二次定时模型用于沿着电路路径表示每个延迟元件，其中每个元件的延迟与局部变化和与全局变化的二阶关系具有一级关系。 经由电路的建模延迟的传播通过简单的ADD操作有效地进行，其中输入传播通过电路路径中的另一元件，并且经由其中两个或多个输入在交叉点合并的MAX操作（或其近似）。 可以对MAX运算符的输入进行高斯测试，如果MAX操作基本为高斯，则可以通过MAX操作（或其近似）进行处理。 否则，它们可以存储在元组中，以便在沿着电路路径的稍后点进行处理。

公开(公告)号：US20090319969A1

公开(公告)日：2009-12-24

申请号：US12143547

申请日：2008-06-20

申请人： Lizheng Zhang ,  Parveen Khurana ,  Vassilios Gerousis ,  Hongliang Chang ,  Sachin Shrivastava

发明人： Lizheng Zhang ,  Parveen Khurana ,  Vassilios Gerousis ,  Hongliang Chang ,  Sachin Shrivastava

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10 ,  G06F2217/78

摘要： A method, system, and computer program product are disclosed for performing statistical leakage power characterization to estimate yield of a circuit in terms of leakage power. According to some approaches, this is performed with consideration of state correlation.

摘要翻译： 公开了一种方法，系统和计算机程序产品，用于执行统计泄漏功率表征以估计电路在泄漏功率方面的产量。 根据一些方法，这是考虑状态相关性来进行的。

公开(公告)号：US20070277134A1

公开(公告)日：2007-11-29

申请号：US11420322

申请日：2006-05-25

申请人： Lizheng Zhang ,  Yuhen Hu ,  Chun-ping Chen

发明人： Lizheng Zhang ,  Yuhen Hu ,  Chun-ping Chen

IPC分类号： G06F17/50

CPC分类号： G06F17/5031 ,  G06F17/504 ,  G06F2217/10 ,  G06F2217/84

摘要： Statistical timing analysis methods for circuits are described which compensate for circuit elements having correlated timing delays with a high degree of computational efficiency. An quadratic timing model is used to represent each delay element along a circuit path, wherein each element's delay has a first-order relationship to local variations and a second-order relationship to global variations. Propagation of the modeled delays through the circuit is efficiently done via straightforward ADD operations where an input propagates through another element in a circuit path, and via a MAX operation (or an approximation thereof) where two or more inputs merge at an intersection. The inputs to the MAX operator can be tested for gaussianity, and can be processed by the MAX operation (or its approximation) if they are substantially gaussian. Otherwise, they may be stored in a tuple for processing at later points along the circuit path.

摘要翻译： 描述了用于补偿具有高计算效率的具有相关定时延迟的电路元件的电路的统计时序分析方法。 二次定时模型用于沿着电路路径表示每个延迟元件，其中每个元件的延迟与局部变化和与全局变化的二阶关系具有一级关系。 经由电路的建模延迟的传播通过简单的ADD操作有效地进行，其中输入传播通过电路路径中的另一元件，并且经由其中两个或多个输入在交叉点合并的MAX操作（或其近似）。 可以对MAX运算符的输入进行高斯测试，如果MAX操作基本为高斯，则可以通过MAX操作（或其近似）进行处理。 否则，它们可以存储在元组中，以便在沿着电路路径的稍后点进行处理。

公开(公告)号：US20070113211A1

公开(公告)日：2007-05-17

申请号：US11282003

申请日：2005-11-17

申请人： Lizheng Zhang ,  YuHen Hu ,  Chun-ping Chen

发明人： Lizheng Zhang ,  YuHen Hu ,  Chun-ping Chen

IPC分类号： G06F17/50

CPC分类号： G06F17/5031

摘要： Statistical timing analysis methods for circuits are described which compensate for circuit elements having correlated timing delays with a high degree of computational efficiency. An extended canonical timing model is used to represent each delay element along a circuit path, wherein the model bears information regarding any correlations that each element has to any other elements in the circuit (and/or to any external global factors, e.g., global temperature variations over the circuit, etc.). The model can be represented in a vectorized format which allows enhancement of computational efficiency, wherein the coefficients of the vectors allow an objective measure of element correlation (and wherein the vectors can be “pruned” by dropping insignificant coefficients to further enhance computational efficiency). A decomposition procedure can be used to decompose correlated elements into uncorrelated elements to allow delays to me more easily propagated through the timing diagram representing the circuit. Finally, a bounded approximation for the output of the MAX operator is described which provides a safely conservative approximation regardless of the linearity of the MAX output.

摘要翻译： 描述了用于补偿具有高计算效率的具有相关定时延迟的电路元件的电路的统计时序分析方法。 扩展规范定时模型用于表示沿着电路路径的每个延迟元件，其中模型承载关于每个元件对电路中的任何其他元件（和/或任何外部全局因素，例如全局温度）的任何相关性的信息 电路上的变化等）。 该模型可以以允许增强计算效率的向量化格式表示，其中矢量的系数允许元素相关性的客观测量（并且其中可以通过丢弃不重要的系数来“修剪”矢量以进一步提高计算效率）。 分解过程可以用于将相关元素分解为不相关元素，以允许延迟通过表示电路的时序图更容易地传播。 最后，描述了MAX运算器的输出的有界近似，其提供了安全保守的近似，而与MAX输出的线性无关。

公开(公告)号：US07212946B1

公开(公告)日：2007-05-01

申请号：US11272234

申请日：2005-11-10

申请人： Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Lizheng Zhang ,  Vladimir Zolotov

发明人： Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Lizheng Zhang ,  Vladimir Zolotov

IPC分类号： G06F17/18 ,  G06F15/00 ,  G06F19/00

CPC分类号： G06F17/5031

摘要： The invention provides a method, system, and program product for accommodating spatially-correlated variation in a process parameter during statistical timing of a circuit. In one embodiment, the method includes dividing an area of the circuit into a plurality of grid cells; associating an independent random variable with each of the plurality of grid cells; and expressing at least one spatially-correlated parameter of a first grid cell as a function of the random variables associated with the first grid cell and at least one neighboring grid cell.

摘要翻译： 本发明提供一种用于在电路的统计定时期间适应处理参数的空间相关变化的方法，系统和程序产品。 在一个实施例中，该方法包括将电路的区域划分成多个网格单元; 将独立随机变量与所述多个网格单元中的每一个相关联; 以及将与第一网格单元和至少一个相邻网格单元相关联的随机变量的函数表达为第一网格单元的至少一个空间相关参数。