公开(公告)号：US20020080900A1

公开(公告)日：2002-06-27

申请号：US10059172

申请日：2002-01-31

申请人： Victor Company of Japan, Ltd.

发明人： Takeo Ohishi

IPC分类号： H03D003/24

CPC分类号： H04N21/6336 ,  H03L7/095 ,  H03L7/146 ,  H03L7/181 ,  H04N21/4135 ,  H04N21/4305 ,  H04N21/6112

摘要： A clock signal generation apparatus includes a first device for extracting reference information from an input digital signal. An oscillator operates for generating a reference clock signal having a frequency depending on a control signal. A second device connected to the first device and the oscillator operates for generating the control signal to the oscillator in response to the reference clock signal generated by the oscillator and the reference information extracted by the first device, and for locking a phase of the reference clock signal to the reference information. A third device connected to the second device operates for deciding whether or not the phase of the reference clock signal is successfully locked to the reference information. A fourth device connected to the second device, a memory, and the third device operates for storing the control signal generated by the second device into the memory when the third device decides that the phase of the reference clock signal is successfully locked to the reference information. A fifth device connected to the memory, the oscillator, and the second device operates for selecting one of the control signal currently generated by the second device and the control signal stored in the memory, and for feeding the selected control signal to the oscillator.

公开(公告)号：US20040105331A1

公开(公告)日：2004-06-03

申请号：US10675994

申请日：2003-10-02

申请人： Sanyo Electric Co., Ltd. ,  Sharp Corporation ,  Victor Company of Japan, Ltd. ,  Pioneer Corporation ,  Hitachi, Ltd. ,  Fujitsu Limited

发明人： Yuichi Kanai ,  Yoshihiro Hori ,  Ryoji Ohno ,  Takeo Ohishi ,  Kenichiro Tada ,  Tatsuya Hirai ,  Jun Kamada

IPC分类号： G11C007/00

CPC分类号： G11B27/329 ,  G11B27/034 ,  G11B27/105 ,  G11B2220/216 ,  G11B2220/2516 ,  G11B2220/2562 ,  H04N5/76 ,  H04N5/765 ,  H04N5/775 ,  H04N5/781 ,  H04N5/85 ,  H04N5/907 ,  H04N9/8042

摘要： A recording area of a hard disk is managed nullunitnull by nullunitnull where a nullunitnull is constituted by physically continuous recording regions having predetermined size, and usage status of the unit is stored in an allocation unit (AU) management table. Data requiring a real time processing is stored unit by unit. When the usage status of the unit is changed or modified due to the recording or deletion of data, the AU management table is updated and then information indicative of the fact that the AU management table has been updated is recorded. An apparatus where the final change is made is detected at the time the hard disk is inserted or a file system is initialized. And if the apparatus which last made the change adopts the file system which does not use the AU management table, then the table is reconfigured so as to retain the consistency of the AU management table.

摘要翻译： 由“单位”管理硬盘的记录区域，其中“单位”由具有预定大小的物理连续记录区域构成，并且单元的使用状态被存储在分配单元（AU）管理表中。 需要实时处理的数据逐个存储。 当由于记录或删除数据而改变或修改了单元的使用状态时，AU管理表被更新，然后记录表示AU管理表被更新的事实的信息。 在插入硬盘或初始化文件系统时检测进行最终更改的装置。 如果上次进行变更的设备采用不使用AU管理表的文件系统，则重新配置表，以保持AU管理表的一致性。

公开(公告)号：US20020048338A1

公开(公告)日：2002-04-25

申请号：US10025583

申请日：2001-12-26

申请人： Victor Company of Japan, Ltd

发明人： Takeo Ohishi

IPC分类号： H03D003/24

CPC分类号： H04N21/6336 ,  H03L7/095 ,  H03L7/146 ,  H03L7/181 ,  H04N21/4135 ,  H04N21/4305 ,  H04N21/6112

摘要： A clock signal generation apparatus includes a first device for extracting reference information from an input digital signal. An oscillator operates for generating a reference clock signal having a frequency depending on a control signal. A second device connected to the first device and the oscillator operates for generating the control signal to the oscillator in response to the reference clock signal generated by the oscillator and the reference information extracted by the first device, and for locking a phase of the reference clock signal to the reference information. A third device connected to the second device operates for deciding whether or not the phase of the reference clock signal is successfully locked to the reference information. A fourth device connected to the second device, a memory, and the third device operates for storing the control signal generated by the second device into the memory when the third device decides that the phase of the reference clock signal is successfully locked to the reference information. A fifth device connected to the memory, the oscillator, and the second device operates for selecting one of the control signal currently generated by the second device and the control signal stored in the memory, and for feeding the selected control signal to the oscillator.

摘要翻译： 时钟信号发生装置包括用于从输入数字信号中提取参考信息的第一装置。 振荡器用于产生具有取决于控制信号的频率的参考时钟信号。 连接到第一设备和振荡器的第二设备响应于由振荡器产生的参考时钟信号和由第一设备提取的参考信息而产生到振荡器的控制信号，并且用于锁定参考时钟的相位 信号给参考信息。 连接到第二设备的第三设备用于确定参考时钟信号的相位是否被成功地锁定到参考信息。 连接到第二设备的第四设备，存储器和第三设备用于当第三设备确定参考时钟信号的相位成功地锁定到参考信息时，将由第二设备产生的控制信号存储到存储器中 。 连接到存储器，振荡器和第二器件的第五器件用于选择当前由第二器件产生的控制信号和存储在存储器中的控制信号之一，并将所选择的控制信号馈送到振荡器。

公开(公告)号：US20010002867A1

公开(公告)日：2001-06-07

申请号：US09761750

申请日：2001-01-18

申请人： Victor Company of Japan, Ltd.

发明人： Seiji Higurashi ,  Yoichi Zenno ,  Takeo Ohishi

IPC分类号： G11B005/09 ,  G11B020/14 ,  G11B020/16

CPC分类号： G11B20/10055 ,  G11B5/0086 ,  G11B20/10009 ,  G11B20/1403

摘要： A digital signal recording apparatus includes an amble generator for generating an amble signal representing a bit-sequence amble pattern. The bit-sequence amble patter can be detected and reproduced by a partial-response detection system nullPR(1, 0, null1)null as a detected amble pattern having a period of state inversions which is shorter than a period of state inversions in a detected amble pattern corresponding to a recorded amble pattern of alternation of null1null and null0null. The amble signal generated by the amble generator and a first digital information signal are combined into a second digital information signal on a time sharing basis. The second digital information signal is recorded on a magnetic recording medium. For example, the bit-sequence amble pattern represented by the amble signal has repetition of six bits of null11000null.

摘要翻译： 一种数字信号记录装置，包括一个产生代表比特序列无序模式的信号的信号的交流发生器。 可以通过部分响应检测系统“PR（1，0，-1）”来检测和再现比特序列逗号模式，作为具有比状态反转周期短的状态反转周期的检测到的交错模式， 对应于记录的交替“1”和“0”的交替模式的检测到的交叉图案。 由交流发生器产生的交流信号和第一数字信息信号在时间共享的基础上组合成第二数字信息信号。 第二数字信息信号被记录在磁记录介质上。 例如，由码元信号表示的比特序列导码模式具有6比特“11000”的重复。