Method and circuit arrangement for amplitude regulation of an oscillator signal
    1.
    发明申请
    Method and circuit arrangement for amplitude regulation of an oscillator signal 有权
    用于振荡器信号幅度调节的方法和电路装置

    公开(公告)号:US20050225386A1

    公开(公告)日:2005-10-13

    申请号:US10976447

    申请日:2004-10-29

    IPC分类号: H03B5/04 H03G3/20 H03L5/00

    CPC分类号: H03L5/00 H03B5/04

    摘要: A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude of the oscillator signal is capable of being adjusted by means of a control signal. The control signal is developed by a regulating circuit that depends upon a comparison result of the oscillator signal with a reference signal such that the amplitude of the oscillator signal adopts a desired value. At least one further reference signal is compared to the oscillator signal and the regulating circuit is adjusted depending on the comparison.

    摘要翻译: 通过将振荡器信号与参考信号进行比较来实现用于控制振荡器信号振幅的电路装置。 振荡器信号的振幅能够通过控制信号进行调整。 控制信号由调节电路产生,该调节电路取决于振荡器信号与参考信号的比较结果,使得振荡器信号的振幅采用期望值。 将至少一个另外的参考信号与振荡器信号进行比较,并且根据比较来调节调节电路。

    Integrated interface apparatus and method of operating an integrated interface apparatus
    2.
    发明授权
    Integrated interface apparatus and method of operating an integrated interface apparatus 有权
    集成接口装置和操作集成接口装置的方法

    公开(公告)号:US07899948B2

    公开(公告)日:2011-03-01

    申请号:US12191313

    申请日:2008-08-14

    IPC分类号: G06F3/00

    CPC分类号: H04L49/90 H04L69/12 H04L69/18

    摘要: In an embodiment of the invention, an integrated interface apparatus for providing a serial differential data input for an integrated processor of a mobile radio terminal has a data reception apparatus having a physical layer which can be alternatively operated in a first operating mode according to a first interface standard or in a second operating mode according to a second interface standard, the first interface standard and the second interface standard not being compatible with one another with respect to the physical layer. In another embodiment of the invention, a method for operating an integrated interface apparatus is provided.

    摘要翻译: 在本发明的一个实施例中,提供用于移动无线电终端的集成处理器的串行差分数据输入的集成接口装置具有数据接收装置,该数据接收装置具有物理层,该物理层可以根据第一 接口标准或者根据第二接口标准在第二操作模式中,第一接口标准和第二接口标准相对于物理层彼此不兼容。 在本发明的另一个实施例中,提供了一种用于操作集成接口装置的方法。

    Method and circuit arrangement for amplitude regulation of an oscillator signal
    3.
    发明授权
    Method and circuit arrangement for amplitude regulation of an oscillator signal 有权
    用于振荡器信号幅度调节的方法和电路装置

    公开(公告)号:US07142069B2

    公开(公告)日:2006-11-28

    申请号:US10976447

    申请日:2004-10-29

    CPC分类号: H03L5/00 H03B5/04

    摘要: A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude of the oscillator signal is capable of being adjusted by means of a control signal. The control signal is developed by a regulating circuit that depends upon a comparison result of the oscillator signal with a reference signal such that the amplitude of the oscillator signal adopts a desired value. At least one further reference signal is compared to the oscillator signal and the regulating circuit is adjusted depending on the comparison.

    摘要翻译: 通过将振荡器信号与参考信号进行比较来实现用于控制振荡器信号振幅的电路装置。 振荡器信号的振幅能够通过控制信号进行调整。 控制信号由调节电路产生,该调节电路取决于振荡器信号与参考信号的比较结果,使得振荡器信号的振幅采用期望值。 将至少一个另外的参考信号与振荡器信号进行比较,并且根据比较来调节调节电路。

    Adjusting driver stage output impedance
    4.
    发明授权
    Adjusting driver stage output impedance 有权
    调整驱动级输出阻抗

    公开(公告)号:US07446557B2

    公开(公告)日:2008-11-04

    申请号:US11364961

    申请日:2006-02-28

    IPC分类号: H03K17/16 H03K19/003

    CPC分类号: H04L25/0278 H04L25/028

    摘要: In order to generate a control signal for adjusting a driver stage with an adjustable output impedance, an impedance signal is generated for a measure of the output impedance of the driver stage. The difference between the impedance signal and a reference signal is calculated, and passed to a sigma-delta modulator to generate a digital bitstream signal. The control signal is then generated depending on the bitstream signal, where the frequencies of the two signal states in the bitstream signal are evaluated by means of digital counters. Depending on the difference of the determined frequencies of the two signal states, a counter is increased or reduced, and the control signal is generated depending on the count of the counter. The impedance signal may be generated by a replica circuit of a pull-up region or a pull-down region of the driver stage to be adjusted.

    摘要翻译: 为了产生用于调整具有可调输出阻抗的驱动级的控制信号,产生用于驱动级的输出阻抗测量的阻抗信号。 计算阻抗信号和参考信号之间的差异,并将其传递给Σ-Δ调制器以产生数字比特流信号。 然后根据比特流信号生成控制信号,其中通过数字计数器评估位流信号中的两个信号状态的频率。 根据两个信号状态的确定频率的差异,增加或减少计数器,并且根据计数器的计数产生控制信号。 阻抗信号可以由要调整的驱动器级的上拉区域或下拉区域的复制电路产生。

    Process and device for outputting a digital signal
    5.
    发明授权
    Process and device for outputting a digital signal 有权
    用于输出数字信号的处理和设备

    公开(公告)号:US07183804B2

    公开(公告)日:2007-02-27

    申请号:US10723256

    申请日:2003-11-26

    IPC分类号: H03K19/0175 H03B1/00 H03F3/45

    CPC分类号: H03K19/01707

    摘要: To output a digital signal in particular according to the LVDS (low voltage differential signalling) standard, a driver stage is supplied with a constant current and thus supplies the digital signal in the form of a current signal with defined current values. As a result of line capacitances of a transmission line, because of the current limited according to the standard the edge steepness and hence the maximum transmittable bit rate can deteriorate. According to the invention, therefore, at least essentially in synchronization with a triggering of the driver stage, at least one current increase signal is generated which via a capacitor causes an additional current increase in the output current of the driver stage. Preferably, the current increase signal via the respective capacitor is switched directly to an output of the driver stage. By using a capacitor, with very little expenditure a limited current pulse can be switched in a temporally targeted manner on the switching processes of the driver stage.

    摘要翻译: 为了根据LVDS(低电压差分信号)标准特别输出数字信号,向恒定电流提供驱动级,从而以具有规定电流值的电流信号的形式提供数字信号。 作为传输线的线路电容的结果,由于根据标准限制了电流,因此边缘陡度和因此最大可发送比特率可能劣化。 因此,根据本发明,至少基本上与驱动级的触发同步,产生至少一个电流增加信号,其经由电容器引起驱动器级的输出电流的附加电流增加。 优选地,经由相应电容器的电流增加信号直接切换到驱动级的输出。 通过使用电容器,在极少的支出下,可以以时间目标的方式在驱动级的切换过程中切换有限的电流脉冲。

    Level shifting
    6.
    发明授权
    Level shifting 有权
    电平转换

    公开(公告)号:US07737755B2

    公开(公告)日:2010-06-15

    申请号:US11766411

    申请日:2007-06-21

    IPC分类号: H03L5/00

    CPC分类号: H03K3/356104

    摘要: Various aspects are described, such as a method for operating a level shifter, in which the level shifter is coupled to a first supply voltage and a second supply voltage different from the first supply voltage. The method may include detecting whether the first supply voltage is present, and decoupling an input of the level shifter from an output of the level shifter responsive to detecting that the first supply voltage is not present.

    摘要翻译: 描述了各种方面,例如用于操作电平移位器的方法,其中电平移位器耦合到第一电源电压和与第一电源电压不同的第二电源电压。 该方法可以包括检测是否存在第一电源电压,以及响应于检测到第一电源电压不存在而将电平移位器的输入与电平移位器的输出去耦合。

    Driver circuit
    7.
    发明授权
    Driver circuit 有权
    驱动电路

    公开(公告)号:US06998880B2

    公开(公告)日:2006-02-14

    申请号:US10675244

    申请日:2003-09-29

    IPC分类号: H03B1/00

    摘要: The invention relates to a driver circuit with a circuit node (10), at least two first transistors (P1, P2), the load sections of which are switched in series and connect the circuit node (10) with a first voltage (U10), at least two second transistors (N1, N2), the load sections of which are switched in series and connect the circuit node (10) with a reference potential, and a control circuit (P3–P6, N3, D1–D4, R1, 16), which is formed in order to regulate at least a first control voltage (Up2) on at least one transistor (P2) of the at least two first transistors (P1, P2) and at least a second control voltage (UN2) on at least one transistor (N2) of the at least two second transistors (N1, N2) dependent on a voltage at the circuit node (10).

    摘要翻译: 本发明涉及一种驱动电路

    Level Shifting
    8.
    发明申请
    Level Shifting 有权
    水平位移

    公开(公告)号:US20080315936A1

    公开(公告)日:2008-12-25

    申请号:US11766411

    申请日:2007-06-21

    IPC分类号: H03L5/00

    CPC分类号: H03K3/356104

    摘要: Various aspects are described, such as a method for operating a level shifter, in which the level shifter is coupled to a first supply voltage and a second supply voltage different from the first supply voltage. The method may include detecting whether the first supply voltage is present, and decoupling an input of the level shifter from an output of the level shifter responsive to detecting that the first supply voltage is not present.

    摘要翻译: 描述了各种方面,例如用于操作电平移位器的方法,其中电平移位器耦合到第一电源电压和与第一电源电压不同的第二电源电压。 该方法可以包括检测是否存在第一电源电压,以及响应于检测到第一电源电压不存在而将电平移位器的输入与电平移位器的输出去耦合。

    Adjusting driver stage output impedance
    9.
    发明申请
    Adjusting driver stage output impedance 有权
    调整驱动级输出阻抗

    公开(公告)号:US20060197550A1

    公开(公告)日:2006-09-07

    申请号:US11364961

    申请日:2006-02-28

    IPC分类号: H03K19/003

    CPC分类号: H04L25/0278 H04L25/028

    摘要: In order to generate a control signal for adjusting a driver stage with an adjustable output impedance, an impedance signal is generated for a measure of the output impedance of the driver stage. The difference between the impedance signal and a reference signal is calculated, and passed to a sigma-delta modulator to generate a digital bitstream signal. The control signal is then generated depending on the bitstream signal, where the frequencies of the two signal states in the bitstream signal are evaluated by means of digital counters. Depending on the difference of the determined frequencies of the two signal states, a counter is increased or reduced, and the control signal is generated depending on the count of the counter. The impedance signal may be generated by a replica circuit of a pull-up region or a pull-down region of the driver stage to be adjusted.

    摘要翻译: 为了产生用于调整具有可调输出阻抗的驱动级的控制信号,产生用于驱动级的输出阻抗测量的阻抗信号。 计算阻抗信号和参考信号之间的差异,并将其传递给Σ-Δ调制器以产生数字比特流信号。 然后根据比特流信号生成控制信号,其中通过数字计数器评估位流信号中的两个信号状态的频率。 根据两个信号状态的确定频率的差异,增加或减少计数器,并且根据计数器的计数产生控制信号。 阻抗信号可以由要调整的驱动级的上拉区域或下拉区域的复制电路产生。