公开(公告)号：US08942144B2

公开(公告)日：2015-01-27

申请号：US13106471

申请日：2011-05-12

申请人： Wei-Chieh Chang ,  Wei-Chi Lo ,  Charng-Show Li ,  Menping Chang

发明人： Wei-Chieh Chang ,  Wei-Chi Lo ,  Charng-Show Li ,  Menping Chang

IPC分类号： H04L12/12 ,  H04L5/16 ,  H04L5/14

CPC分类号： H04L5/16 ,  H04L5/1423 ,  H04L12/12 ,  H04L12/1881 ,  Y02D50/40 ,  Y02D50/42

摘要： An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device.

摘要翻译： 一种能量效率以太网物理层（PHY）设备，包括EEE控制模块，其被配置为基于操作条件生成控制信号以将PHY设备转换为低功耗模式;以及暂停帧发生器模块，其响应于所述控制信号而产生 一个暂停框架。 暂停帧生成器模块被配置为将暂停帧发送到媒体访问控制（MAC）设备，以在暂停时间段内减少从MAC设备到PHY设备的数据分组的传入流。 在操作中，暂停帧发生器模块产生暂停帧，其包括指示PHY设备处于低功耗模式的时间长度的暂停时间。 基于要从PHY设备发送的数据流量的量来自适应地确定每个暂停帧的暂停时间的值。

公开(公告)号：US20120287829A1

公开(公告)日：2012-11-15

申请号：US13106471

申请日：2011-05-12

申请人： Wei-Chieh Chang ,  Wei-Chi Lo ,  Charng-Show Li ,  Menping Chang

发明人： Wei-Chieh Chang ,  Wei-Chi Lo ,  Charng-Show Li ,  Menping Chang

IPC分类号： H04L5/16

CPC分类号： H04L5/16 ,  H04L5/1423 ,  H04L12/12 ,  H04L12/1881 ,  Y02D50/40 ,  Y02D50/42

摘要： An energy efficient Ethernet physical layer (PHY) device including an EEE control module configured to generate a control signal to transition the PHY device into a low power consumption mode based an operating condition, and a pause frame generator module responsive to the control signals to generate a pause frame. The pause frame generator module is configured to send the pause frame to a media access control (MAC) device to reduce an incoming flow of data packets from the MAC device to the PHY device for a pause time duration. In operation, the pause frame generator module generates the pause frame including a pause time indicating the length of time for the PHY device to be in the low power consumption mode. The value of the pause time for each pause frame is determined adaptively based on the amount of data traffic to be transmitted from the PHY device.

摘要翻译： 一种能量效率以太网物理层（PHY）设备，包括EEE控制模块，其被配置为基于操作条件生成控制信号以将PHY设备转换为低功耗模式;以及暂停帧发生器模块，其响应于所述控制信号而产生 一个暂停框架。 暂停帧生成器模块被配置为将暂停帧发送到媒体访问控制（MAC）设备，以在暂停时间段内减少来自MAC设备到PHY设备的数据分组的传入流。 在操作中，暂停帧发生器模块产生暂停帧，其包括指示PHY设备处于低功耗模式的时间长度的暂停时间。 基于要从PHY设备发送的数据流量的量来自适应地确定每个暂停帧的暂停时间的值。

公开(公告)号：US20100066405A1

公开(公告)日：2010-03-18

申请号：US12625249

申请日：2009-11-24

申请人： Menping Chang ,  Soon Lim

发明人： Menping Chang ,  Soon Lim

IPC分类号： H03K19/003

CPC分类号： H04L25/028 ,  H04L25/0298

摘要： A line driver includes current sources and resistors that form a bridge circuit in which a bridge resistor is connected between an internal node and ground, and a series resistor connected between the internal node and the driver's output node. The internal node is connected to receive a unit current from a first stage transistor, and the output node is connected to receive an amplified current from a second stage transistor that is N times the unit current. The bridge resistor is formed with a resistance value set such that the voltages at the internal node and the output node are equal, i.e., such that no current flows through the series resistor. The resistance value of the series resistor is thus adjustable to optimize output impedance in a manner independent of the driver's gain. An echo cancellation circuit is utilized to eliminate noise from two associated line drivers.

摘要翻译： 线路驱动器包括形成桥接电路的电流源和电阻器，其中桥接电阻器连接在内部节点和地之间，并且串联电阻器连接在内部节点和驱动器的输出节点之间。 内部节点被连接以从第一级晶体管接收单位电流，并且输出节点被连接以从N单位电流的第二级晶体管接收放大的电流。 桥式电阻器形成有电阻值设定，使得内部节点和输出节点处的电压相等，即使得没有电流流过串联电阻器。 因此，串联电阻器的电阻值可以调节，以独立于驱动器增益的方式优化输出阻抗。 使用回波消除电路来消除来自两个相关线路驱动器的噪声。

公开(公告)号：US06211716B1

公开(公告)日：2001-04-03

申请号：US09322247

申请日：1999-05-28

申请人： Hai T. Nguyen ,  Menping Chang

发明人： Hai T. Nguyen ,  Menping Chang

IPC分类号： H03L500

CPC分类号： H03F3/45973 ,  H04L25/064

摘要： An apparatus of compensating for offset in a received signal generated from a forward path stage, includes a first peak detector for receiving a first signal from the forward path stage and capable of detecting a peak of the first signal; a second peak detector for receiving a second signal from the forward path stage and capable of detecting a peak of the second signal; a differential amplifier coupled to the first peak detector and the second peak detector and capable of generating an offset control signal; and a compensation stage coupled to the differential amplifier and capable of compensating for offset in the received signal in response to the offset control signal. A method of compensating for offset in a received signal includes detecting a level of a first signal from a forward path stage; detecting a level of a second signal from the forward path stage; and generating an offset control signal to reduce an offset in the received signal in response to the level difference of the first signal and the second signal.

摘要翻译： 补偿从正向路径级产生的接收信号中的偏移的装置包括：第一峰值检测器，用于从前向路径级接收第一信号并且能够检测第一信号的峰值; 第二峰值检测器，用于从前向路径级接收第二信号，并能够检测第二信号的峰值; 差分放大器，其耦合到所述第一峰值检测器和所述第二峰值检测器，并且能够产生偏移控制信号; 以及补偿级，其耦合到差分放大器并且能够响应于偏移控制信号补偿接收信号中的偏移。 补偿接收信号中的偏移的方法包括检测来自前向路径级的第一信号的电平; 从前向路径级检测第二信号的电平; 以及产生偏移控制信号，以响应于第一信号和第二信号的电平差来减小接收信号中的偏移。

公开(公告)号：US6137832A

公开(公告)日：2000-10-24

申请号：US122259

申请日：1998-07-24

申请人： Jung-Chen Lin ,  Menping Chang

发明人： Jung-Chen Lin ,  Menping Chang

IPC分类号： H03H7/30

CPC分类号： H04L25/03885

摘要： Systems and methods are described for adaptive equalizers. A circuit adapted to transform an equalizer input signal at a receiver to approximate an output signal at a transmitter includes an equalizer, a phase matching loop coupled to the equalizer, and an amplitude locking loop coupled to the equalizer. The equalizer can include a number of coarse band segments to provide coarse adjustment, at least one of which includes a number of fine band segments to provide fine adjustment. The systems and methods provide advantages in that multiple cable lengths can be serviced by a single equalizer, variations in the low frequency gain and the location of the zero point due to variations in manufacture and operating temperature are obviated, and a suitable gain can be provided at much higher frequencies.

摘要翻译： 为自适应均衡器描述了系统和方法。 适于在接收机处变换均衡器输入信号以逼近发射机处的输出信号的电路包括均衡器，耦合到均衡器的相位匹配环路和耦合到均衡器的幅度锁定环路。 均衡器可以包括多个粗带段以提供粗调整，其中至少一个包括多个细带段以提供精细调整。 这些系统和方法提供的优点在于，可以通过单个均衡器来维护多个电缆长度，消除了低频增益的变化和由于制造和操作温度的变化引起的零点的位置，并且可以提供合适的增益 频率高得多。

公开(公告)号：US20090140579A1

公开(公告)日：2009-06-04

申请号：US12365858

申请日：2009-02-04

申请人： Menping Chang ,  Jing Tian

发明人： Menping Chang ,  Jing Tian

IPC分类号： H02H3/42

CPC分类号： H04L12/10 ,  H01L2224/48137 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/13091 ,  H01L2924/3011 ,  H04L49/40 ,  Y10S307/01 ,  Y10T307/766 ,  Y10T307/832 ,  H01L2924/00 ,  H01L2224/45099

摘要： A semiconductor relay switch having two data ports receiving incoming signals and a power supply terminal receiving a power supply voltage is responsive to a power supply voltage level and an energy level of the incoming signals to open and close its conduction paths. The relay switch is open when a valid power supply level is detected and when there is no supply power on the power supply terminal but a high energy level is detected in the incoming signals. The relay switch is closed to allow conduction between the two data ports only when there is no power supply voltage on the power supply terminal and an energy level below a predetermined threshold is detected in the incoming signals. In one embodiment, the semiconductor relay switch includes a main conduction switch circuit, an energy detect circuit and a control signal generator.

摘要翻译： 具有接收输入信号的两个数据端口和接收电源电压的电源端子的半导体继电器开关响应于电源电压电平和输入信号的能级以打开和闭合其导通路径。 当检测到有效的电源电平时，以及当电源端子没有电源但在输入信号中检测到高能量电平时，继电器开关打开。 继电器开关闭合，仅在电源端子上没有电源电压并且在输入信号中检测到低于预定阈值的能量水平时才允许两个数据端口之间导通。 在一个实施例中，半导体继电器开关包括主导通开关电路，能量检测电路和控制信号发生器。

公开(公告)号：US06232802B1

公开(公告)日：2001-05-15

申请号：US09321938

申请日：1999-05-28

申请人： Menping Chang ,  Hai T. Nguyen

发明人： Menping Chang ,  Hai T. Nguyen

IPC分类号： G01R1900

CPC分类号： G01R19/04

摘要： An apparatus for tracking a peak level of an input signal includes a comparator for comparing the peak level of the input signal with a reference peak voltage signal. A sample and block circuit is coupled to the output of the comparator and is capable of sampling a portion of the input signal. The sampled portion of the input signal is defined by a smart window (timing window) which is received by the sample and block circuit. The sample and block circuit controls a charge pump that determines the level of the reference peak voltage signal. A method of generating a reference peak voltage signal includes receiving an input data, generating a timing window based upon the input data to define a sampling portion in the input data, comparing a level of the reference peak voltage signal with a level of the sampling portion in the input data, and determining a level of the reference peak voltage signal based upon the comparing step.

摘要翻译： 用于跟踪输入信号的峰值电平的装置包括用于将输入信号的峰值电平与参考峰值电压信号进行比较的比较器。 采样和电路电路耦合到比较器的输出端，并能够对输入信号的一部分进行采样。 输入信号的采样部分由采样和块电路接收的智能窗口（定时窗口）定义。 样品和块电路控制电荷泵，其确定参考峰值电压信号的电平。 产生参考峰值电压信号的方法包括接收输入数据，基于输入数据产生定时窗口，以定义输入数据中的采样部分，将参考峰值电压信号的电平与采样部分的电平进行比较 在所述输入数据中，并且基于所述比较步骤确定所述参考峰值电压信号的电平。

公开(公告)号：US06114844A

公开(公告)日：2000-09-05

申请号：US321983

申请日：1999-05-28

申请人： Menping Chang ,  Vuong K. Le

发明人： Menping Chang ,  Vuong K. Le

IPC分类号： G05F3/26 ,  G05F1/40

CPC分类号： G05F3/262

摘要： An output driver is provided with driving and filtering capability. An output current driver and output voltage driver embodiments are provided. The output current driver includes, an operational amplifier having a first input for receiving a first input voltage V.sub.1, a second input for receiving a second input voltage V.sub.2, and an output for generating an output voltage Vc. The output current driver also includes a transistor having an input terminal coupled to the output of the operational amplifier for receiving the output voltage Vc, a first terminal coupled to a differential pair, and a second terminal coupled to the second input of the operational amplifier, wherein an output current I.sub.out flows across the transistor. A control current I.sub.CONTROL determines a value of the first input voltage V.sub.1, while the output voltage Vc controls the transistor so that the second voltage V.sub.2 becomes equal to the first voltage V.sub.1. The voltage driver includes, a first plurality of parallel modules coupled to an output load and capable of setting a first equivalent resistive value and a second equivalent resistive value, and a second plurality of parallel modules coupled to the output load and capable of setting a third equivalent resistive value and a fourth equivalent resistive value. At least some of the equivalent resistive values determine an output voltage value across the output load.

摘要翻译： 输出驱动器具有驱动和滤波功能。 提供输出电流驱动器和输出电压驱动器实施例。 输出电流驱动器包括：运算放大器，具有用于接收第一输入电压V1的第一输入端，用于接收第二输入电压V2的第二输入端和用于产生输出电压Vc的输出端。 输出电流驱动器还包括晶体管，其具有耦合到运算放大器的输出的输入端，用于接收输出电压Vc，耦合到差分对的第一端和耦合到运算放大器的第二输入的第二端， 其中输出电流Iout流过晶体管。 控制电流ICONTROL确定第一输入电压V1的值，而输出电压Vc控制晶体管，使得第二电压V2变为等于第一电压V1。 电压驱动器包括耦合到输出负载并且能够设置第一等效电阻值和第二等效电阻值的第一多个并联模块和耦合到输出负载的第二多个并联模块，并且能够设置第三个 等效电阻值和第四等效电阻值。 至少一些等效电阻值决定了输出负载的输出电压值。

公开(公告)号：US20130229926A1

公开(公告)日：2013-09-05

申请号：US13409491

申请日：2012-03-01

申请人： Litai Lu ,  Sheng Lin ,  Yuwen Hsia ,  Menping Chang

发明人： Litai Lu ,  Sheng Lin ,  Yuwen Hsia ,  Menping Chang

IPC分类号： H04L12/66 ,  H04L12/26

CPC分类号： H04L12/413

摘要： A network device includes a physical layer transceiver configured to receive incoming data on a data link at an input clock rate and to store the incoming data in a buffer. The physical layer transceiver includes a Media Independent Interface (MII) controller configured to receive the incoming data stored in the buffer and to transmit the incoming data over a MII bus based on a MII clock where the MII clock is a spread spectrum clock. The network device further includes a Media Access Control (MAC) device configured to receiving incoming data from the physical layer transceiver over the MII bus where the incoming data is clocked by the spread spectrum MII clock.

摘要翻译： 网络设备包括：物理层收发器，被配置为以输入时钟速率在数据链路上接收输入数据，并将输入数据存储在缓冲器中。 物理层收发器包括媒体独立接口（MII）控制器，其被配置为接收存储在缓冲器中的输入数据，并且通过MII总线基于MII时钟（其中MII时钟是扩频时钟）来传送输入数据。 网络设备还包括媒体访问控制（MAC）设备，其被配置为通过MII总线从物理层收发器接收输入数据，其中输入数据由扩频MII时钟计时。

公开(公告)号：US08022736B2

公开(公告)日：2011-09-20

申请号：US12625249

申请日：2009-11-24

申请人： Menping Chang ,  Soon Lim

发明人： Menping Chang ,  Soon Lim

IPC分类号： H03K5/12

CPC分类号： H04L25/028 ,  H04L25/0298

摘要： A line driver includes current sources and resistors that form a bridge circuit in which a bridge resistor is connected between an internal node and ground, and a series resistor connected between the internal node and the driver's output node. The internal node is connected to receive a unit current from a first stage transistor, and the output node is connected to receive an amplified current from a second stage transistor that is N times the unit current. The bridge resistor is formed with a resistance value set such that the voltages at the internal node and the output node are equal, i.e., such that no current flows through the series resistor. The resistance value of the series resistor is thus adjustable to optimize output impedance in a manner independent of the driver's gain. An echo cancellation circuit is utilized to eliminate noise from two associated line drivers.

摘要翻译： 线路驱动器包括形成桥接电路的电流源和电阻器，其中桥接电阻器连接在内部节点和地之间，并且串联电阻器连接在内部节点和驱动器的输出节点之间。 内部节点被连接以从第一级晶体管接收单位电流，并且输出节点被连接以从N单位电流的第二级晶体管接收放大的电流。 桥式电阻器形成有电阻值设定，使得内部节点和输出节点处的电压相等，即使得没有电流流过串联电阻器。 因此，串联电阻器的电阻值可以调节，以独立于驱动器增益的方式优化输出阻抗。 使用回波消除电路来消除来自两个相关线路驱动器的噪声。