Method for accessing memory data
    1.
    发明授权
    Method for accessing memory data 有权
    访问存储器数据的方法

    公开(公告)号:US07861044B2

    公开(公告)日:2010-12-28

    申请号:US11945311

    申请日:2007-11-27

    IPC分类号: G06F13/00 G06F13/28 G06F13/14

    摘要: A memory access method for accessing data from a non-volatile memory in a south bridge is provided. Memory access is performed under a system management mode (SMM). Under the protection of the SMM mode, the desired memory address is not altered by an interrupt handler, therefore memory data is accessed correctly.

    摘要翻译: 提供了一种用于从南桥的非易失性存储器访问数据的存储器访问方法。 在系统管理模式(SMM)下执行内存访问。 在SMM模式的保护下,所需的存储器地址不会被中断处理程序改变,因此存储器数据被正确访问。

    METHOD FOR ACCESSING MEMORY DATA
    2.
    发明申请
    METHOD FOR ACCESSING MEMORY DATA 有权
    访问存储器数据的方法

    公开(公告)号:US20080222345A1

    公开(公告)日:2008-09-11

    申请号:US11945311

    申请日:2007-11-27

    IPC分类号: G06F12/00

    摘要: A memory access method for accessing data from a non-volatile memory in a south bridge is provided. Memory access is performed under a system management mode (SMM). Under the protection of the SMM mode, the desired memory address is not altered by an interrupt handler, therefore memory data is accessed correctly.

    摘要翻译: 提供了一种用于从南桥的非易失性存储器访问数据的存储器访问方法。 在系统管理模式(SMM)下执行内存访问。 在SMM模式的保护下,所需的存储器地址不会被中断处理程序改变,因此存储器数据被正确访问。

    APPARATUS AND METHOD OF ADJUSTING SYSTEM EFFICIENCY
    3.
    发明申请
    APPARATUS AND METHOD OF ADJUSTING SYSTEM EFFICIENCY 有权
    调整系统效率的装置和方法

    公开(公告)号:US20080012585A1

    公开(公告)日:2008-01-17

    申请号:US11622027

    申请日:2007-01-11

    IPC分类号: G01R27/08

    摘要: Apparatus and methods of adjusting system efficiency for a current-consuming system are disclosed. In the disclosed apparatus, a system current detector receives a system current from the current-consuming system and calculates a system current variation accordingly. A system efficiency adjustment module is coupled to the system current detector to receive the system current variation and output a frequency control signal and a voltage control signal accordingly.

    摘要翻译: 公开了一种调节耗电系统效率的装置和方法。 在所公开的装置中,系统电流检测器从耗电系统接收系统电流并相应地计算系统电流变化。 系统效率调节模块耦合到系统电流检测器以接收系统电流变化并相应地输出频率控制信号和电压控制信号。

    Apparatus and method of adjusting system efficiency
    5.
    发明授权
    Apparatus and method of adjusting system efficiency 有权
    调整系统效率的装置和方法

    公开(公告)号:US07554344B2

    公开(公告)日:2009-06-30

    申请号:US11622027

    申请日:2007-01-11

    IPC分类号: G01R27/08 G01R31/08

    摘要: Apparatus and methods of adjusting system efficiency for a current-consuming system are disclosed. In the disclosed apparatus, a system current detector receives a system current from the current-consuming system and calculates a system current variation accordingly. A system efficiency adjustment module is coupled to the system current detector to receive the system current variation and output a frequency control signal and a voltage control signal accordingly.

    摘要翻译: 公开了一种调节耗电系统效率的装置和方法。 在所公开的装置中,系统电流检测器从耗电系统接收系统电流并相应地计算系统电流变化。 系统效率调节模块耦合到系统电流检测器以接收系统电流变化并相应地输出频率控制信号和电压控制信号。

    System and method for trapping bus cycles
    6.
    发明申请
    System and method for trapping bus cycles 有权
    用于捕获总线周期的系统和方法

    公开(公告)号:US20080010548A1

    公开(公告)日:2008-01-10

    申请号:US11656455

    申请日:2007-01-23

    IPC分类号: G06F11/00

    CPC分类号: G06F11/221

    摘要: A bus cycle trapping system includes at least one register, a north bridge, a south bridge and a central processing unit (CPU). The register is configured to store at least one trapping parameter. The north bridge traps a bus cycle matching the at least one trapping parameter while issuing an activating signal. The south bridge sends a system management interrupt message according to the activating signal. The CPU enters a system management mode according to the system management interrupt and executes a system management interrupt routine for doing a debugging test of the bus cycle matching the trapping parameter.

    摘要翻译: 总线周期捕集系统包括至少一个寄存器,北桥,南桥和中央处理单元(CPU)。 寄存器被配置为存储至少一个捕获参数。 北桥在发出激活信号的同时捕获与至少一个捕获参数匹配的总线周期。 南桥根据激活信号发送系统管理中断消息。 CPU根据系统管理中断进入系统管理模式,执行系统管理中断程序,进行与捕获参数匹配的总线周期的调试测试。

    System and method for trapping bus cycles
    9.
    发明授权
    System and method for trapping bus cycles 有权
    用于捕获总线周期的系统和方法

    公开(公告)号:US07716533B2

    公开(公告)日:2010-05-11

    申请号:US11656455

    申请日:2007-01-23

    IPC分类号: G06F11/00

    CPC分类号: G06F11/221

    摘要: A bus cycle trapping system includes at least one register, a north bridge, a south bridge and a central processing unit (CPU). The register is configured to store at least one trapping parameter. The north bridge traps a bus cycle matching the at least one trapping parameter while issuing an activating signal. The south bridge sends a system management interrupt message according to the activating signal. The CPU enters a system management mode according to the system management interrupt and executes a system management interrupt routine for doing a debugging test of the bus cycle matching the trapping parameter.

    摘要翻译: 总线周期捕集系统包括至少一个寄存器,北桥,南桥和中央处理单元(CPU)。 寄存器被配置为存储至少一个捕获参数。 北桥在发出激活信号的同时捕获与至少一个捕获参数匹配的总线周期。 南桥根据激活信号发送系统管理中断消息。 CPU根据系统管理中断进入系统管理模式,执行系统管理中断程序,进行与捕获参数匹配的总线周期的调试测试。