摘要:
A partitioned pseudo-random logic test (PRLT) for integrated circuit chips for improving manufacturability is disclosed. The technique makes available previously difficult-to-collect empirical data to accurately improve test effectiveness while significantly lowering test time and test cost. An embodiment includes a method for testing IC chips, including generating values for latches for a complete test pattern set, partitioning the test pattern set into a plurality of partitioned test pattern subsets, and running the subsets against a chip. Another embodiment is directed to a system that tests IC chips, having a latch value generator that generates values for latches for a complete test pattern set, a test pattern divider that partitions the complete test pattern set into a plurality of partitioned test pattern subsets, and a tester that runs the partitioned test pattern subsets against the chip.
摘要:
A method for preparing a logic structure for random pattern testing is disclosed. In an exemplary embodiment of the invention, the method includes configuring a select mechanism within a data scan chain, the select mechanism configured between a first register in the data scan chain and a second register. A parallel data path is routed within the scan chain, the parallel data path beginning from an input side of the first register, running through the select mechanism, and ending at an input side of the second register. Thus configured, the select mechanism is capable of switching a source path of input data to said second register from a normal data path to the parallel data path. When the parallel data path is selected as the source path of input data to the second register, data loaded into the second register matches data loaded into the first register.
摘要:
A test method and apparatus for randomly testing logic structures. The method includes identifying and analyzing a functional behavior of a logic structure to be covered during the random testing, modifying the logic structure such that the logic structure behaves in a functional manner during random testing, and generating patterns to exercise the modified logic structure.
摘要:
An exemplary embodiment of the invention is a built-in self-test (BIST) method and apparatus for testing the logic circuits on an integrated circuit. Random test pattern data is generated by a random pattern generator. A random resistant fault analysis (RRFA) program is used to determine the weighting requirements, on a per channel basis, for testing the logic circuits. The weighting requirements from the RRFA program are applied to the random test pattern data resulting in weighted test pattern data. The weighted test pattern data is then programmably applied to the scan chain.
摘要:
A test method and apparatus for randomly testing logic structures. The method includes identifying and analyzing a functional behavior of a logic structure to be covered during the random testing, modifying the logic structure such that the logic structure behaves in a functional manner during random testing, and generating patterns to exercise the modified logic structure.
摘要:
A method, system and computer program product for enhancing the computer screen security. The gaze of a user on a screen is tracked. The locations of the screen other than the location of the gaze of the user are distorted. Information is displayed in an area on the screen (“content area”) at the location of the user's gaze. Upon receiving input (e.g., audio, touch, key sequences) from the user to tune the content area on the screen to display information, the received input is mapped to a command for tuning the content area on the screen to display the information. The content area is then reconfigured in accordance with the user's request. By allowing the content area to be customized by the user, the security is enhanced by allowing the user to control what information is to be kept private.
摘要:
A computer-implemented method, system and computer program product for managing computer file storage is presented. In one embodiment the method includes receiving a file for storage. In response to determining that the file exceeds a pre-determined size, the file is stored in a pre-designated folder that is reserved for oversized files.
摘要:
A method for implementing improved observability of random resistant logic included in an integrated circuit (IC) design includes configuring a multiplexer device to pass, to a preexisting storage latch within the design, one of: a signal from one or more observation points within the random resistant logic and an output of first preexisting combinational logic; and selecting a preexisting net within the IC design to generate a randomized logic signal that, in a test mode, is passed to the multiplexer device to serve as a control signal thereto; wherein, in the test mode, the existing storage latch captures data randomly selected from either the existing combinational logic and the one or more observation points and in a normal mode, the existing storage latch captures data from only the existing combinational logic, facilitating random testing of the random resistant logic in a manner that avoids adding latches to the design.
摘要:
A processor-implemented method, system and/or computer program product for managing computer file storage is presented. A file, which is designated for storage, is received. Upon determining that the file exceeds a pre-determined size, the file is stored in a pre-designated folder that is reserved for oversized files. This pre-designated folder is protected such that any file stored within the pre-designated folder is prevented from being moved into archival storage.
摘要:
A process registers a system management event in an application configuration database. Responsive to detecting the registered system management event during execution of one application of the set of applications, the process identifies applications of the set of applications associated with the registered system management event that are executing. The process then terminates the applications of the set of applications associated with the registered system management event that are executing. Responsive to terminating the applications of the set of applications associated with the registered system managing event that are executing, the process then executes a handler that processes the registered system management event.