公开(公告)号：US07579848B2

公开(公告)日：2009-08-25

申请号：US11350049

申请日：2006-02-07

申请人： Wilmer R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

发明人： Wilmer R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

IPC分类号： G01R31/02

CPC分类号： G01R1/07378 ,  G01R1/0483 ,  G01R1/06716 ,  G01R1/07342 ,  G01R3/00

摘要： An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

摘要翻译： 描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。 示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电的微制造弹簧触头，第二连接器结构，包括至少一个基板，并具有 设置在连接器表面上并对应于该组弹簧触点的至少一个导电接触垫，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置， 使得在至少一个位置中，至少一个导电微制造的弹簧触头电连接到至少一个导电接触垫。

公开(公告)号：US07812626B2

公开(公告)日：2010-10-12

申请号：US12546432

申请日：2009-08-24

申请人： Wilmer R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

发明人： Wilmer R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

IPC分类号： G01R31/02

CPC分类号： G01R1/06711 ,  G01R1/07342 ,  G01R3/00

摘要： An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

摘要翻译： 描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。 示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电的微制造弹簧触头，第二连接器结构，包括至少一个基板，并具有 设置在连接器表面上并对应于该组弹簧触点的至少一个导电接触垫，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置， 使得在至少一个位置中，至少一个导电微制造的弹簧触头电连接到至少一个导电接触垫。

公开(公告)号：US20090153165A1

公开(公告)日：2009-06-18

申请号：US12354520

申请日：2009-01-15

申请人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

发明人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

IPC分类号： G01R31/02

CPC分类号： G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

摘要翻译： 描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。 示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于 主板安装表面和用于调整参考平面相对于晶片的平面度的机构。 具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。 互连结构和方法优选地提供改进的制造周期。

公开(公告)号：US07884634B2

公开(公告)日：2011-02-08

申请号：US12354520

申请日：2009-01-15

申请人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

发明人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

IPC分类号： G01R31/26

CPC分类号： G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

公开(公告)号：US20100066393A1

公开(公告)日：2010-03-18

申请号：US12546432

申请日：2009-08-24

申请人： W. R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

发明人： W. R. Bottoms ,  Fu Chiung Chong ,  Sammy Mok ,  Douglas Modlin

IPC分类号： G01R31/02

CPC分类号： G01R1/06711 ,  G01R1/07342 ,  G01R3/00

摘要： An improved interconnection system is described, such as for electrical contactors and connectors, electronic device or module package assemblies, socket assemblies, and/or probe card assembly systems. An exemplary connector comprises a first connector structure comprising a contactor substrate having a contact surface and a bonding surface, and one or more electrically conductive micro-fabricated spring contacts extending from the probe surface, a second connector structure comprising at least one substrate and having a set of at least one electrically conductive contact pad located on a connector surface and corresponding to the set of spring contacts, and means for movably positioning and aligning the first connector structure and the second connector structure between at least a first position and a second position, such that in at least one position, at least one electrically conductive micro-fabricated spring contact is electrically connected to at least one electrically conductive contact pad.

摘要翻译： 描述了改进的互连系统，例如用于电接触器和连接器，电子设备或模块封装组件，插座组件和/或探针卡组件系统。 示例性连接器包括第一连接器结构，其包括具有接触表面和接合表面的接触器基板以及从探针表面延伸的一个或多个导电的微制造弹簧触头，第二连接器结构，包括至少一个基板，并具有 设置在连接器表面上并对应于该组弹簧触点的至少一个导电接触垫，以及用于在至少第一位置和第二位置之间可移动地定位和对准第一连接器结构和第二连接器结构的装置， 使得在至少一个位置中，至少一个导电微制造的弹簧触头电连接到至少一个导电接触垫。

公开(公告)号：US07382142B2

公开(公告)日：2008-06-03

申请号：US11133021

申请日：2005-05-18

申请人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

发明人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

IPC分类号： G01R31/02

CPC分类号： G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

摘要翻译： 描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。 示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于 主板安装表面和用于调整参考平面相对于晶片的平面度的机构。 具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。 互连结构和方法优选地提供改进的制造周期。

公开(公告)号：US07872482B2

公开(公告)日：2011-01-18

申请号：US11858064

申请日：2007-09-19

申请人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

发明人： Fu Chiung Chong ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

IPC分类号： G01R31/02

CPC分类号： G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

摘要翻译： 描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。 示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于 主板安装表面和用于调整参考平面相对于晶片的平面度的机构。 具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。 互连结构和方法优选地提供改进的制造周期。

公开(公告)号：US20080246500A1

公开(公告)日：2008-10-09

申请号：US11858064

申请日：2007-09-19

申请人： Fu Chiung CHONG ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

发明人： Fu Chiung CHONG ,  Andrew Kao ,  Douglas McKay ,  Anna Litza ,  Douglas Modlin ,  Sammy Mok ,  Nitin Parekh ,  Frank John Swiatowiec ,  Zhaohui Shan

IPC分类号： G01R1/073 ,  H01R43/00

CPC分类号： G01R31/02 ,  G01R1/073 ,  G01R1/07378 ,  G01R31/2889 ,  Y10T29/49117 ,  Y10T29/49222

摘要： An improved interconnection system and method is described, such as for connectors, socket assemblies and/or probe card systems. An exemplary system comprises a probe card interface assembly (PCIA) for establishing electrical connections to a semiconductor wafer mounted in a prober. The PCIA comprises a motherboard parallel to the semiconductor wafer having an upper surface and an opposing lower planar mounting surface, a reference plane defined by a least three points located between the lower surface of the motherboard and the wafer, at least one component located below the motherboard mounting surface, and a mechanism for adjusting the planarity of the reference plane with respect to the wafer. A probe chip having a plurality of spring probes extending there from is mountable and demountable from the PCIA, without the need for further planarity adjustment. The interconnection structures and methods preferably provide improved fabrication cycles.

摘要翻译： 描述了改进的互连系统和方法，例如用于连接器，插座组件和/或探针卡系统。 示例性系统包括用于建立到安装在探测器中的半导体晶片的电连接的探针卡接口组件（PCIA）。 PCIA包括平行于具有上表面和相对的下平面安装表面的半导体晶片的母板，由位于母板的下表面和晶片之间的至少三个点限定的参考平面，至少一个位于 主板安装表面和用于调整参考平面相对于晶片的平面度的机构。 具有从其延伸的多个弹簧探针的探针芯片可从PCIA安装和拆卸，而不需要进一步的平面度调节。 互连结构和方法优选地提供改进的制造周期。

公开(公告)号：US07138818B2

公开(公告)日：2006-11-21

申请号：US11327728

申请日：2006-01-05

申请人： Fu Chiung Chong ,  Sammy Mok

发明人： Fu Chiung Chong ,  Sammy Mok

IPC分类号： G01R31/02

CPC分类号： G01R31/2863 ,  G01R1/06722 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2874 ,  G01R31/2889

摘要： Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.

公开(公告)号：US07772860B2

公开(公告)日：2010-08-10

申请号：US12175393

申请日：2008-07-17

申请人： Fu Chiung Chong ,  Sammy Mok

发明人： Fu Chiung Chong ,  Sammy Mok

IPC分类号： G01R31/02

CPC分类号： G01R31/2863 ,  G01R1/06722 ,  G01R1/07342 ,  G01R3/00 ,  G01R31/2874 ,  G01R31/2889

摘要： Several embodiments of massively parallel interface structures are disclosed, which may be used in a wide variety of permanent or temporary applications, such as for interconnecting integrated circuits (ICs) to test and burn-in equipment, for interconnecting modules within electronic devices, for interconnecting computers and other peripheral devices within a network, or for interconnecting other electronic circuitry. Preferred embodiments of the massively parallel interface structures provide massively parallel integrated circuit test assemblies. The massively parallel interface structures preferably use one or more substrates to establish connections between one or more integrated circuits on a semiconductor wafer, and one or more test modules. One or more layers on the intermediate substrates preferably include MEMS and/or thin-film fabricated spring probes. The parallel interface assemblies provide tight signal pad pitch and compliance, and preferably enable the parallel testing or burn-in of multiple ICs, using commercial wafer probing equipment. In some preferred embodiments, the parallel interface assembly structures include separable standard electrical connector components, which reduces assembly manufacturing cost and manufacturing time. These structures and assemblies enable high speed testing in wafer form.

摘要翻译： 公开了大量并行接口结构的几个实施例，其可以用于各种永久或临时应用中，例如用于互连集成电路（IC）以测试和老化设备，用于互连电子设备内的模块，用于互连 计算机和其他外围设备，或用于互连其他电子电路。 大规模并行接口结构的优选实施例提供大规模并行集成电路测试组件。 大规模并行接口结构优选地使用一个或多个衬底来建立半导体晶片上的一个或多个集成电路与一个或多个测试模块之间的连接。 中间基板上的一层或多层优选地包括MEMS和/或薄膜制造的弹簧探针。 并联接口组件提供紧密的信号垫间距和柔顺性，并且优选地使用商业晶圆探测设备实现多个IC的并行测试或老化。 在一些优选实施例中，并行接口组件结构包括可分离的标准电连接器部件，这降低了组装制造成本和制造时间。 这些结构和组件能够以晶圆形式进行高速测试。