公开(公告)号：US10726890B2

公开(公告)日：2020-07-28

申请号：US16177460

申请日：2018-11-01

Applicant: Winbond Electronics Corp.

Inventor： Lih-Wei Lin ,  Yu-Cheng Chuang ,  Sung-Yi Lee

IPC: G11C13/00 ,  G11C11/00

Abstract: A resistive memory apparatus including a memory cell array and a voltage selector circuit is provided. The memory cell array includes a plurality of memory cells. The voltage selector circuit is coupled to the memory cell array. The voltage selector circuit performs a voltage applying operation on the memory cells via a plurality of different signal transmission paths. Each of the signal transmission paths passes one of the memory cells. IR drops of two of the signal transmission paths are substantially identical, and signal transmission directions thereof are different. In addition, an operating method of a resistive memory apparatus is also provided.

公开(公告)号：US20230274782A1

公开(公告)日：2023-08-31

申请号：US18072723

申请日：2022-12-01

Applicant: Winbond Electronics Corp.

Inventor： Lung-Chi Cheng ,  Ying-Shan Kuo ,  Jun-Yao Huang ,  Ju-Chieh Cheng ,  Yu-Cheng Chuang

IPC: G11C16/16 ,  G11C16/34

CPC classification number: G11C16/16 ,  G11C16/3445 ,  G11C16/3431

Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.

公开(公告)号：US12237017B2

公开(公告)日：2025-02-25

申请号：US18072723

申请日：2022-12-01

Applicant: Winbond Electronics Corp.

Inventor： Lung-Chi Cheng ,  Ying-Shan Kuo ,  Jun-Yao Huang ,  Ju-Chieh Cheng ,  Yu-Cheng Chuang

IPC: G11C16/34 ,  G11C16/16

Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.

公开(公告)号：US20190172535A1

公开(公告)日：2019-06-06

申请号：US16177460

申请日：2018-11-01

Applicant: Winbond Electronics Corp.

Inventor： Lih-Wei Lin ,  Yu-Cheng Chuang ,  Sung-Yi Lee

IPC: G11C13/00

Abstract: A resistive memory apparatus including a memory cell array and a voltage selector circuit is provided. The memory cell array includes a plurality of memory cells. The voltage selector circuit is coupled to the memory cell array. The voltage selector circuit performs a voltage applying operation on the memory cells via a plurality of different signal transmission paths. Each of the signal transmission paths passes one of the memory cells. IR drops of two of the signal transmission paths are substantially identical, and signal transmission directions thereof are different. In addition, an operating method of a resistive memory apparatus is also provided.