-
公开(公告)号：US20230274782A1
公开(公告)日：2023-08-31
申请号：US18072723
申请日：2022-12-01
Applicant: Winbond Electronics Corp.
Inventor： Lung-Chi Cheng , Ying-Shan Kuo , Jun-Yao Huang , Ju-Chieh Cheng , Yu-Cheng Chuang
CPC classification number: G11C16/16 , G11C16/3445 , G11C16/3431
Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.
-
公开(公告)号：US10978149B1
公开(公告)日：2021-04-13
申请号：US16872374
申请日：2020-05-12
Applicant: Winbond Electronics Corp.
Inventor： Ju-Chieh Cheng , Ying-Shan Kuo , Lih-Wei Lin , Lung-Chi Cheng
IPC: G11C13/00
Abstract: A resistive memory apparatus and an adjusting method for write-in voltage thereof are provided. The adjusting method for write-in voltage includes: selecting an under test memory cell array in a resistive memory; performing N reset operations on a plurality of memory cells of the under test memory cell array according to a reset voltage, and performing N set operations on the memory cells of the under test memory cell array according to a set voltage, wherein n is an integer greater than 1; calculating a reset time variation rate of the reset operations and a set time variation rate of the set operations; and adjusting a voltage value of one of the set voltage and the reset voltage according to the reset time variation rate and the set time variation rate.
-
公开(公告)号：US20240347118A1
公开(公告)日：2024-10-17
申请号：US18319501
申请日：2023-05-18
Applicant: Winbond Electronics Corp.
Inventor： Lung-Chi Cheng , Shan-Hsuan Tsai , Ying-Shan Kuo , Ngatik Cheung , Ju-Chieh Cheng
CPC classification number: G11C16/3459 , G11C16/102
Abstract: A memory device and an enhance programming method thereof are provided. The enhance programming method includes: performing program and verifying operations on a plurality of memory cell groups of a memory division, where each of the memory cell group corresponds to at least one byte; calculating a programming time for completing program operation of each of the memory cell groups; setting an indication flag when the programming time is larger than a preset threshold value; and, when the indication flag is in a setting state, increasing at least one of a plurality of program operation parameters, and performing an enhancement programming operation on the memory cell groups of the memory division.
-
公开(公告)号：US20210335421A1
公开(公告)日：2021-10-28
申请号：US17226052
申请日：2021-04-08
Applicant: Winbond Electronics Corp.
Inventor： Lih-Wei Lin , Lung-Chi Cheng , Ju-Chieh Cheng , Ying-Shan Kuo
IPC: G11C13/00
Abstract: A resistive memory storage apparatus including a memory cell, a selecting transistor and a memory controller is provided. The memory cell outputs a writing current during a writing pulse width period. The selecting transistor is coupled to the memory cell. The memory controller is coupled to the selecting transistor and the memory cell. The memory controller is configured to apply a control voltage that gradually changes to a predetermined voltage level to a control end of the selecting transistor during a resistance transition phase of the writing pulse width period and set the control voltage to the predetermined voltage level during a filament stabilization phase after the resistance transition phase, so as to limit the writing current to a predetermined current value. In addition, an operating method for a resistive memory storage apparatus is also provided.
-
公开(公告)号：US20240087644A1
公开(公告)日：2024-03-14
申请号：US18457377
申请日：2023-08-29
Applicant: Winbond Electronics Corp.
Inventor： I-Hsien Tseng , Lung-Chi Cheng , Ju-Chieh Cheng , Jun-Yao Huang , Ping-Kun Wang
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C13/0007 , G11C2013/0083
Abstract: A forming operation of resistive memory device is provided. The operation includes: applying a pre-forming gate voltage and a pre-forming bit line voltage to a target memory cell; performing a dense switching forming operation, wherein the dense switching forming operation includes alternately performing dense set operations and dense reset operations on the target memory cell, wherein the dense set operation includes applying a dense switching gate voltage and a dense set bit line voltage; and performing a normal set operation on the target memory cell, wherein the normal set operation includes applying a normal set gate voltage and a normal set bit line voltage to the target memory cell, the normal set gate voltage is greater than the pre-forming gate voltage and the dense switching gate voltage, and the normal set bit line voltage is less than the pre-forming bit line voltage and the dense set bit line voltage.
-
Patent Agency Ranking
公开(公告)号：US11289160B2
公开(公告)日：2022-03-29
申请号：US17067341
申请日：2020-10-09
Applicant: Winbond Electronics Corp.
Inventor： Lih-Wei Lin , Ju-Chieh Cheng , Lung-Chi Cheng , Ying-Shan Kuo , Yu-An Chen
Abstract: A data writing method is provided. According to the present application, the data writing method includes steps of receiving an expected data, performing a plurality of readings on a target storage unit to obtain a plurality of read data; determining whether the plurality of read data are the same as the expected data respectively to generate a plurality of comparison results; and performing a writing operation procedure on the target storage unit according to the plurality of comparison results and the expected data.
-
公开(公告)号：US20200027507A1
公开(公告)日：2020-01-23
申请号：US16103942
申请日：2018-08-15
Applicant: Winbond Electronics Corp.
Inventor： Lih-Wei Lin , Ju-Chieh Cheng , Tsung-Huan Tsai , I-Hsien Tseng
Abstract: An operating method of a resistive memory storage apparatus includes: applying a forming voltage to a memory cell and obtaining a cell current of the memory cell; and determining whether to adjust the forming voltage and apply the adjusted forming voltage to the memory cell according to a magnitude relationship between the cell current and a reference current. The memory cell to which the forming voltage is applied operates in a heavy forming mode and serves as a one-time programmable memory device.
-
公开(公告)号：US12237017B2
公开(公告)日：2025-02-25
申请号：US18072723
申请日：2022-12-01
Applicant: Winbond Electronics Corp.
Inventor： Lung-Chi Cheng , Ying-Shan Kuo , Jun-Yao Huang , Ju-Chieh Cheng , Yu-Cheng Chuang
Abstract: A block erase method for a flash memory is provided. The block erase method is to perform block erase on a block with a predetermined block size. The block erase method includes: performing an erase verification on bytes byte-by-byte in the block when performing the block erase; checking an erase step of the byte when the byte does not pass the erase verification; when the erase step of the byte exceeds a predetermined threshold value, performing the block erase with a partitioned block smaller than the predetermined block size, and returning to an erase verification stage to perform the erase verification; and when the erase step of the bytes does not exceed the predetermined threshold value, continuing to perform the block erase with the predetermined block size, and returning to the erasure verification stage to continue to perform the erase verification.
-
公开(公告)号：US11437101B2
公开(公告)日：2022-09-06
申请号：US17226052
申请日：2021-04-08
Applicant: Winbond Electronics Corp.
Inventor： Lih-Wei Lin , Lung-Chi Cheng , Ju-Chieh Cheng , Ying-Shan Kuo
Abstract: A resistive memory storage apparatus including a memory cell, a selecting transistor and a memory controller is provided. The memory cell outputs a writing current during a writing pulse width period. The selecting transistor is coupled to the memory cell. The memory controller is coupled to the selecting transistor and the memory cell. The memory controller is configured to apply a control voltage that gradually changes to a predetermined voltage level to a control end of the selecting transistor during a resistance transition phase of the writing pulse width period and set the control voltage to the predetermined voltage level during a filament stabilization phase after the resistance transition phase, so as to limit the writing current to a predetermined current value. In addition, an operating method for a resistive memory storage apparatus is also provided.
-
公开(公告)号：US09543010B2
公开(公告)日：2017-01-10
申请号：US15019187
申请日：2016-02-09
Applicant: WINBOND ELECTRONICS CORP.
Inventor： Lih-Wei Lin , Chia-Hung Lin , Tsung-Huan Tsai , Ju-Chieh Cheng , I-Hsien Tseng
CPC classification number: G11C13/0069 , G11C13/0064 , G11C29/50008 , G11C2013/0066 , G11C2013/0083 , G11C2013/0092 , G11C2029/5006 , G11C2213/79 , G11C2213/82
Abstract: A measurement system including a testing machine and a resistive memory is provided. The resistive memory includes a first storage cell. The first storage cell includes a transistor and a variable resistor. During a specific period, the testing machine provides a write voltage to change the state of the variable resistor. During a maintaining period, the testing machine maintains the level of the write voltage and measures the current passing through the variable resistor. When the current passing through the variable resistor does not arrive at a pre-determined value, the testing machine increases the level of the write voltage. Furthermore, a resistive memory utilizing the testing machine is also provided.
Abstract translation: 提供了包括测试机和电阻式存储器的测量系统。 电阻性存储器包括第一存储单元。 第一存储单元包括晶体管和可变电阻器。 在特定的时间段内，测试机提供写入电压来改变可变电阻的状态。 在维护期间，测试机器保持写入电压的电平并测量通过可变电阻器的电流。 当通过可变电阻器的电流未达到预定值时，测试机器增加写入电压的电平。 此外，还提供了利用测试机器的电阻性存储器。
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.012 seconds)
