公开(公告)号：US09473087B2

公开(公告)日：2016-10-18

申请号：US14521191

申请日：2014-10-22

Applicant: Wolfson Microelectronics Ltd.

Inventor： John Paul Lesso ,  Toru Ido

IPC: H03F3/38 ,  H03F3/217 ,  H03F1/02

CPC classification number: H03F3/2171 ,  H03F1/0211 ,  H03F3/187 ,  H03F3/217 ,  H03F2200/165 ,  H03F2200/171 ,  H03F2200/333 ,  H03F2200/351 ,  H03G1/0088

Abstract: Methods and apparatus for Class-D amplifier circuits with improved power efficiency. The circuit has an output stage with at least first and second switches and a modulator that receives an input signal to be amplified, SIN, and a first clock signal fSW. The modulator controls the duty cycles of the first and second switches, within a switching cycle based on the input signal, wherein the switching cycle has a switching frequency based on the first clock signal. A frequency controller controls the frequency of the first clock signal in response to an indication of the amplitude of the input signal so as to provide a first switching frequency at a first input signal amplitude and a second, lower, switching frequency at a second, lower, input signal amplitude. A lower switching frequency can be tolerated at low signal amplitudes and varying the switching frequency in this way thus maintains stability whilst reducing switching power losses.

Abstract translation: 具有提高功率效率的D类放大器电路的方法和装置。 电路具有至少具有第一和第二开关的输出级和接收要被放大的输入信号SIN和第一时钟信号fSW的调制器。 调制器基于输入信号在开关周期内控制第一和第二开关的占空比，其中开关周期具有基于第一时钟信号的开关频率。 频率控制器响应于输入信号的幅度的指示来控制第一时钟信号的频率，以便提供第一输入信号幅度的第一开关频率和在第二输入信号幅度下的第二，较低开关频率 ，输入信号幅度。 在低信号幅度下可以容忍较低的开关频率，并且以这种方式改变开关频率，从而在降低开关功率损耗的同时保持稳定性。