公开(公告)号：US11290361B1

公开(公告)日：2022-03-29

申请号：US16716256

申请日：2019-12-16

Applicant: Xilinx, Inc.

Inventor： Chengchen Hu ,  Ji Yang ,  Yan Zhang ,  Gordon J. Brebner ,  Siyi Qiao

IPC: H04L12/26 ,  H04L43/12 ,  H04L43/10 ,  H04L43/062 ,  H04L43/50 ,  H04L43/028

Abstract: A device includes a programmable passive measurement hardware engine, a programmable active measurement hardware engine, and a configuration engine. The programmable passive measurement hardware engine is configured to collect statistical data, from data transmission at a network line rate, used for network measurement. The programmable active measurement hardware engine is configured to generate probe packets and wherein the programmable active measurement hardware engine is further configured to collect responses to the generated probe packets, wherein the collected responses are used for the network measurement. The configuration engine is configured to receive data settings and wherein the configuration engine is further configured to program the programmable passive measurement hardware engine and the programmable active measurement hardware engine with the received data settings.

公开(公告)号：US11657040B2

公开(公告)日：2023-05-23

申请号：US17084942

申请日：2020-10-30

Applicant: XILINX, INC.

Inventor： Ji Yang ,  Haris Javaid ,  Sundararajarao Mohan ,  Gordon John Brebner

IPC: G06F16/23 ,  G06F12/0875

CPC classification number: G06F16/2379 ,  G06F12/0875 ,  G06F2212/45

Abstract: Embodiments herein describe a hardware accelerator (e.g., a network acceleration engine) for a blockchain machine or node. The hardware accelerator parses packets containing separate components of a block of transactions to generate data to perform a validation process. To avoid the latency that comes with using software, the embodiments herein describe a protocol processor in the hardware accelerator that parses the packets and prepares the data so it can be consumed by downstream components in the accelerator without software intervention. These downstream components can then perform a validation operation to validate one or more transactions before those transactions are committed (i.e., added) to a ledger of a permissioned blockchain.

公开(公告)号：US11431815B1

公开(公告)日：2022-08-30

申请号：US16869321

申请日：2020-05-07

Applicant: Xilinx, Inc.

Inventor： Guanwen Zhong ,  Haris Javaid ,  Chengchen Hu ,  Ji Yang ,  Gordon J. Brebner

IPC: H04L67/56 ,  H04L69/16 ,  H04L45/302 ,  H04L45/16 ,  H04L69/324

Abstract: Mining proxy acceleration may include receiving, within a mining proxy, packetized data from a mining pool server and determining, using the mining proxy, whether the packetized data qualifies for broadcast processing. In response to determining that the packetized data qualifies for broadcast processing, the packetized data can be modified using the mining proxy to generate broadcast data. The broadcast data can be broadcast, using the mining proxy, to a plurality of miners subscribed to the mining proxy.

公开(公告)号：US20230367923A1

公开(公告)日：2023-11-16

申请号：US17662818

申请日：2022-05-10

Applicant: Xilinx, Inc.

Inventor： Ji Yang ,  Haris Javaid ,  Sundararajarao Mohan

IPC: G06F30/20 ,  H04L9/00

CPC classification number: G06F30/20 ,  H04L9/50 ,  G06F2111/02

Abstract: A simulation framework is capable modeling a hardware implementation of a reference software system using models specified in different computer-readable languages. The models correspond to different ones of a plurality of subsystems of the hardware implementation. Input data is provided to a first simulator configured to simulate a first model of a first subsystem of the modeled hardware implementation. The input data is captured from execution of the reference software system. The first simulator executing the first model generates a first data file specifying output of the first subsystem. The first data file specifies intermediate data of the modeled hardware implementation. The first data file is provided to a second simulator configured to simulate a second model of a second subsystem of the modeled hardware implementation. The second simulator executing the second model generates a second data file specifying output of the second subsystem.

公开(公告)号：US11641323B1

公开(公告)日：2023-05-02

申请号：US17037359

申请日：2020-09-29

Applicant: XILINX, INC.

Inventor： Nguyen Duy Anh Tuan ,  Ji Yang ,  Chengchen Hu ,  Yan Zhang ,  Guanwen Zhong ,  Gordon John Brebner

IPC: H04L47/11 ,  H04L49/901 ,  H04L47/12 ,  H04L41/0803 ,  H04L41/00

Abstract: Examples herein describe an acceleration framework that includes a hybrid congestion control (CC) engine where some components are implemented in software (e.g., a CC algorithm) while other components are implemented in hardware (e.g., measurement and enforcement modules and a flexible processing unit). The hardware components can be designed to provide measurements that can be used by multiple different types of CC algorithms. Depending on which CC algorithms are currently enabled, the hardware components can be programmed to perform measurement, processing, and enforcement tasks, thereby freeing the CPUs in the host to perform other tasks. In this manner, the hybrid CC engine can have the flexibility of a pure software CC algorithm with the advantage of performing many of the operations associated with the CC algorithm in hardware.

公开(公告)号：US11743051B2

公开(公告)日：2023-08-29

申请号：US17083195

申请日：2020-10-28

Applicant: XILINX, INC.

Inventor： Haris Javaid ,  Ji Yang ,  Sundararajarao Mohan ,  Gordon John Brebner

IPC: H04L9/32 ,  G06F16/23 ,  G06F30/331 ,  H04L9/00

CPC classification number: H04L9/3247 ,  G06F16/2336 ,  G06F30/331 ,  H04L9/321 ,  H04L9/50 ,  H04L2209/125

Abstract: Embodiments herein describe a hardware accelerator for a blockchain node. The hardware accelerator is used to perform a validation operation to validate one or more transactions before those transactions are committed to a ledger of a blockchain. The blockchain may include multiple peer-nodes, each of which contains standard software running on a server or container. Instead of validating a block of transactions using software, the hardware accelerator can validate the transactions in a fraction of the time. The peer-node software then gathers the validation results from the hardware accelerator and combines the results with received block data to derive the block which is committed to the stored ledger.