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公开(公告)号：US08902004B2
公开(公告)日：2014-12-02
申请号：US13629123
申请日：2012-09-27
Applicant: Xilinx, Inc.
Inventor： Patrick J. Quinn , John K. Jennings , Darragh Walsh , Padraig Kelly
IPC: H03F3/45
CPC classification number: H03F3/45 , H03F1/56 , Y10T29/49002
Abstract: A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.
Abstract translation: 电路包括放大器，其包括具有第一输入端和第二输入端的差分输入级。 电路还包括耦合到第一输入端和第二输入端的差分输入线，以及至少部分地包围差分输入线的屏蔽。 屏蔽连接到放大器差分输入级的一个节点。
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公开(公告)号：US09048860B1
公开(公告)日：2015-06-02
申请号：US14297161
申请日：2014-06-05
Applicant: Xilinx, Inc.
Inventor： Patrick J. Quinn
Abstract: An apparatus relating generally to an analog-to-digital converter (“ADC”) is disclosed. In such an apparatus, the ADC is configured for successive approximations. The ADC includes a digital-to-analog converter (“DAC”), a comparator, and a control block. The DAC is coupled to receive a reference input signal and coupled to provide an analog output signal. The analog output signal is capacitively coupled to an analog input node through a capacitor. The capacitor is coupled between the DAC and the comparator to provide capacitive coupling therebetween. The comparator is coupled to the analog input node. The comparator is further coupled to provide a comparator output signal to the control block. The control block is configured for successive approximations to provide a digital output signal to a digital output node. The DAC is coupled to the digital output node to receive the digital output signal as a feedback input signal.
Abstract translation: 公开了一种与模数转换器（“ADC”）相关的装置。 在这种装置中，ADC被配置为逐次逼近。 ADC包括数模转换器（“DAC”），比较器和控制块。 DAC耦合以接收参考输入信号并被耦合以提供模拟输出信号。 模拟输出信号通过电容电容耦合到模拟输入节点。 电容器耦合在DAC和比较器之间以提供电容耦合。 比较器耦合到模拟输入节点。 比较器进一步耦合以向控制块提供比较器输出信号。 控制块被配置为逐次逼近以向数字输出节点提供数字输出信号。 DAC耦合到数字输出节点，以接收数字输出信号作为反馈输入信号。
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3.发明申请公开(公告)号：US20140085003A1
公开(公告)日：2014-03-27
申请号：US13629123
申请日：2012-09-27
Applicant: Xilinx, Inc.
Inventor： Patrick J. Quinn , John K. Jennings , Darragh Walsh , Padraig Kelly
CPC classification number: H03F3/45 , H03F1/56 , Y10T29/49002
Abstract: A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.
Abstract translation: 电路包括放大器，其包括具有第一输入端和第二输入端的差分输入级。 电路还包括耦合到第一输入端和第二输入端的差分输入线，以及至少部分地包围差分输入线的屏蔽。 屏蔽连接到放大器差分输入级的一个节点。
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