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公开(公告)号：US20200335515A1
公开(公告)日：2020-10-22
申请号：US16915939
申请日：2020-06-29
发明人： Qianbin Xu , Haohao Yang , EnBo Wang , Yong Zhang , Jialan He
IPC分类号： H01L27/11582 , H01L27/1157
摘要： Embodiments of 3D memory devices having an inter-deck plug and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a first memory deck including interleaved conductor and dielectric layers above the substrate, a second memory deck including interleaved conductor and dielectric layers above the first memory deck, and a first and a second channel structure each extending vertically through the first or second memory deck. The first channel structure includes a first memory film and semiconductor channel along a sidewall of the first channel structure, and an inter-deck plug in an upper portion of the first channel structure and in contact with the first semiconductor channel. A lateral surface of the inter-deck plug is smooth. The second channel structure includes a second memory film and semiconductor channel along a sidewall of the second channel structure. The second semiconductor channel is in contact with the inter-deck plug.
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公开(公告)号：US20200111807A1
公开(公告)日：2020-04-09
申请号：US16194267
申请日：2018-11-16
发明人： Qianbin Xu , Haohao Yang , EnBo Wang , Yong Zhang , Jialan He
IPC分类号： H01L27/11582 , H01L27/1157
摘要： Embodiments of 3D memory devices having an inter-deck plug and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a first memory deck including interleaved conductor and dielectric layers above the substrate, a second memory deck including interleaved conductor and dielectric layers above the first memory deck, and a first and a second channel structure each extending vertically through the first or second memory deck. The first channel structure includes a first memory film and semiconductor channel along a sidewall of the first channel structure, and an inter-deck plug in an upper portion of the first channel structure and in contact with the first semiconductor channel. A lateral surface of the inter-deck plug is smooth. The second channel structure includes a second memory film and semiconductor channel along a sidewall of the second channel structure. The second semiconductor channel is in contact with the inter-deck plug.
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3.发明申请公开(公告)号：US20200105781A1
公开(公告)日：2020-04-02
申请号：US16194273
申请日：2018-11-16
发明人： Haohao Yang , Yong Zhang , EnBo Wang , Ruo Fang Zhang , Fushan Zhang , Qianbin Xu
IPC分类号： H01L27/11578 , H01L27/06 , H01L27/10 , H01L27/11565 , H01L27/11551 , G11C16/04
摘要： Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.
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公开(公告)号：US11889686B2
公开(公告)日：2024-01-30
申请号：US17468596
申请日：2021-09-07
发明人： Miao Shen , Li Hong Xiao , Yushi Hu , Qian Tao , Mei Lan Guo , Yong Zhang , Jian Hua Sun
摘要： Aspects of the disclosure provide a method for fabricating semiconductor device. The method includes characterizing an etch process that is used to etch channel holes and dummy channel holes in a stack of alternating sacrificial gate layers and insulating layers upon a substrate of a semiconductor device. The channel holes are in a core region and the dummy channel holes are in a staircase region. The stack of alternating sacrificial gate layers and insulating layers extend from the core region into in the staircase region of a stair-step form. The method further includes determining a first shape for defining the dummy channel holes in a layout based on the characterization of the etch process. The first shape is different from a second shape for defining the channel holes.
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公开(公告)号：US10741578B2
公开(公告)日：2020-08-11
申请号：US16194267
申请日：2018-11-16
发明人： Qianbin Xu , Haohao Yang , EnBo Wang , Yong Zhang , Jialan He
IPC分类号： H01L27/11582 , H01L27/1157
摘要： Embodiments of 3D memory devices having an inter-deck plug and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a first memory deck including interleaved conductor and dielectric layers above the substrate, a second memory deck including interleaved conductor and dielectric layers above the first memory deck, and a first and a second channel structure each extending vertically through the first or second memory deck. The first channel structure includes a first memory film and semiconductor channel along a sidewall of the first channel structure, and an inter-deck plug in an upper portion of the first channel structure and in contact with the first semiconductor channel. A lateral surface of the inter-deck plug is smooth. The second channel structure includes a second memory film and semiconductor channel along a sidewall of the second channel structure. The second semiconductor channel is in contact with the inter-deck plug.
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公开(公告)号：US10892280B2
公开(公告)日：2021-01-12
申请号：US16915939
申请日：2020-06-29
发明人： Qianbin Xu , Haohao Yang , EnBo Wang , Yong Zhang , Jialan He
IPC分类号： H01L27/11582 , H01L27/1157
摘要： Embodiments of 3D memory devices having an inter-deck plug and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a first memory deck including interleaved conductor and dielectric layers above the substrate, a second memory deck including interleaved conductor and dielectric layers above the first memory deck, and a first and a second channel structure each extending vertically through the first or second memory deck. The first channel structure includes a first memory film and semiconductor channel along a sidewall of the first channel structure, and an inter-deck plug in an upper portion of the first channel structure and in contact with the first semiconductor channel. A lateral surface of the inter-deck plug is smooth. The second channel structure includes a second memory film and semiconductor channel along a sidewall of the second channel structure. The second semiconductor channel is in contact with the inter-deck plug.
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公开(公告)号：US10714493B2
公开(公告)日：2020-07-14
申请号：US16194273
申请日：2018-11-16
发明人： Haohao Yang , Yong Zhang , EnBo Wang , Ruo Fang Zhang , Fushan Zhang , Qianbin Xu
IPC分类号： G11C16/04 , H01L27/11578 , H01L27/06 , H01L27/10 , H01L27/11551 , H01L27/11565
摘要： Embodiments of 3D memory devices with a semiconductor plug protected by a dielectric layer and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate, a memory stack including a plurality of interleaved conductor layers and dielectric layers on the substrate, and a memory string extending vertically through the memory stack. The memory string includes a semiconductor plug in a lower portion of the memory string, a protective dielectric layer on the semiconductor plug, and a memory film above the protective dielectric layer and along a sidewall of the memory string.
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