Semiconductor device
    1.
    发明申请
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号:US20070164394A1

    公开(公告)日:2007-07-19

    申请号:US11511442

    申请日:2006-08-29

    IPC分类号: H01L29/00

    摘要: On a semiconductor substrate a silicon oxide film is formed and provided with a recess. In the recess a reflector layer of copper is disposed as a blocking layer with a barrier metal posed therebetween. The reflector layer of copper is covered with a silicon oxide film and thereon a fuse region provided with a plurality of fuses is provided. The reflector layer of copper has a plane of reflection recessed downward to reflect a laser beam. The reflector layer of copper is arranged to overlap substantially the entirety of the fuse region, as seen in a plane. A laser beam radiated to blow the fuse can have a reduced effect on a vicinity of the fuse region. A semiconductor device reduced in size can be obtained.

    摘要翻译: 在半导体衬底上形成氧化硅膜并设置有凹部。 在凹部中,铜的反射器层被设置为阻挡层,其间具有阻挡金属。 铜的反射层被氧化硅膜覆盖,并且在其上提供设有多个保险丝的保险丝区域。 铜的反射层具有向下凹入的反射平面以反射激光束。 铜的反射器层布置成基本上与整个熔断器区域重叠,如在平面中所见。 照射熔断器的激光束可以对保险丝区域的附近产生减小的影响。 可以获得尺寸减小的半导体装置。

    Semiconductor device with alignment mark
    2.
    发明授权
    Semiconductor device with alignment mark 失效
    具有对准标记的半导体器件

    公开(公告)号:US07034406B2

    公开(公告)日:2006-04-25

    申请号:US10870976

    申请日:2004-06-21

    IPC分类号: H01L23/544

    摘要: A semiconductor device includes an alignment mark arranged on a surface, and including a high reflectance portion and a flat low reflectance portion; and a first silicon oxide film formed internally and provided with a plurality of first embedded portions filled with a material different from a material of portions around the embedded portions. The first embedded portions are formed in at least a portion of a region avoiding a portion shaded by projecting the high reflectance portion onto the silicon oxide film.

    摘要翻译: 半导体器件包括布置在表面上的对准标记,并且包括高反射率部分和平坦的低反射率部分; 以及第一氧化硅膜,其内部形成有多个第一嵌入部分,该第一嵌入部分填充有与嵌入部分周围的部分材料不同的材料。 第一嵌入部分形成在区域的至少一部分中,避免通过将高反射率部分投影到氧化硅膜上而被遮蔽的部分。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US07115966B2

    公开(公告)日:2006-10-03

    申请号:US10375125

    申请日:2003-02-28

    IPC分类号: H01L29/00 H01L29/73

    摘要: On a semiconductor substrate a silicon oxide film is formed and provided with a recess. In the recess a reflector layer of copper is disposed as a blocking layer with a barrier metal posed therebetween. The reflector layer of copper is covered with a silicon oxide film and thereon a fuse region provided with a plurality of fuses is provided. The reflector layer of copper has a plane of reflection recessed downward to reflect a laser beam. The reflector layer of copper is arranged to overlap substantially the entirety of the fuse region, as seen in a plane. A laser beam radiated to blow the fuse can have a reduced effect on a vicinity of the fuse region. A semiconductor device reduced in size can be obtained.

    摘要翻译: 在半导体衬底上形成氧化硅膜并设置有凹部。 在凹部中,铜的反射器层被设置为阻挡层,其间具有阻挡金属。 铜的反射层被氧化硅膜覆盖,并且在其上提供设有多个保险丝的保险丝区域。 铜的反射层具有向下凹入的反射平面以反射激光束。 铜的反射器层布置成基本上与整个熔断器区域重叠,如在平面中所见。 照射熔断器的激光束可以对保险丝区域的附近产生减小的影响。 可以获得尺寸减小的半导体装置。

    Semiconductor device and fuse blowout method
    4.
    发明授权
    Semiconductor device and fuse blowout method 失效
    半导体器件和保险丝熔断法

    公开(公告)号:US07705418B2

    公开(公告)日:2010-04-27

    申请号:US11425573

    申请日:2006-06-21

    IPC分类号: H01L21/82

    摘要: A fuse includes a fuse portion laid in such a manner that the direction of each turn of the fuse portion is parallel to the direction in which pads are arranged. The distance between the pads and the fuse portion is defined as the distance between the side of a pad facing the fuse portion and the pad nearest to the turn facing the particular side. The distance between the turn of the fuse portion and the nearest pad is the distance between the pads and the fuse portion. The pads and the fuse portion are distant from each other by a length at least ten times the width of the fuse.

    摘要翻译: 保险丝包括保险丝部分,其以使得熔丝部分的每个转向的方向平行于焊盘布置方向的方式布置。 焊盘和熔断部分之间的距离被定义为面对熔丝部分的焊盘的侧面与最靠近转向面的面对特定侧面的距离。 保险丝部分和最近的焊盘之间的距离是焊盘和熔断器部分之间的距离。 焊盘和熔丝部分彼此之间距离保险丝宽度的至少十倍。

    SEMICONDUCTOR DEVICE
    5.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号:US20080164969A1

    公开(公告)日:2008-07-10

    申请号:US11958360

    申请日:2007-12-17

    IPC分类号: H01H37/76

    摘要: The semiconductor device which has an electric straight line-like fuse with a small occupying area is offered.A plurality of projecting portions 10f are formed in the position shifted from the middle position of electric fuse part 10a, and, more concretely, are formed in the position distant from via 10e and near via 10d. A plurality of projecting portions 20f are formed in the position shifted from the middle position of electric fuse part 20a, and, more concretely, are formed in the position distant from via 20d and near 20e. That is, projecting portions 10f and projecting portions 20f are arranged in the shape of zigzag.

    摘要翻译: 提供具有小占用面积的电直线状熔断器的半导体器件。 多个突出部分10f形成在从电熔丝部分10a的中间位置偏移的位置,更具体地,形成在远离通孔10e和靠近通孔10d的位置。 多个突出部分20f形成在从电熔丝部分20a的中间位置移位的位置,更具体地,形成在远离通孔20d和靠近20e的位置。 也就是说,突出部分10f和突出部分20f被布置成Z字形。

    SEMICONDUCTOR INTEGRATED CIRCUIT
    7.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT 有权
    半导体集成电路

    公开(公告)号:US20130049166A1

    公开(公告)日:2013-02-28

    申请号:US13592949

    申请日:2012-08-23

    IPC分类号: H01L23/62

    摘要: A semiconductor integrated circuit which can perform reliable relief processing using an electric fuse. The semiconductor integrated circuit includes a fuse wiring, a first electrode pad, a second electrode pad, a pollution-control layer, and a first via hole wiring and a second via hole wiring. The fuse wiring is cut by a current exceeding a predetermined value. A first electrode pad is connected to one side of a fuse wiring, a second electrode pad is connected to the other of a fuse wiring, a pollution-control layer is formed in the upper layer and the lower layer of the fuse wiring via an insulating layer. In the fuse wiring, a second via hole wiring of a pair is formed in the outside of a first via hole wiring so that the first via hole wiring is surrounded.

    摘要翻译: 一种半导体集成电路,其可以使用电熔丝执行可靠的浮雕处理。 半导体集成电路包括熔丝布线,第一电极焊盘,第二电极焊盘,污染控制层以及第一通孔布线和第二通孔布线。 保险丝布线被超过预定值的电流切断。 第一电极焊盘连接到熔丝布线的一侧,第二电极焊盘连接到熔丝布线的另一侧,污染控制层通过绝缘体形成在熔丝布线的上层和下层中 层。 在保险丝布线中,在第一通孔布线的外侧形成有一对第二通孔布线,使得第一通孔布线被包围。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号:US07808076B2

    公开(公告)日:2010-10-05

    申请号:US11958360

    申请日:2007-12-17

    IPC分类号: H01L29/00

    摘要: The semiconductor device which has an electric straight line-like fuse with a small occupying area is offered.A plurality of projecting portions 10f are formed in the position shifted from the middle position of electric fuse part 10a, and, more concretely, are formed in the position distant from via 10e and near via 10d. A plurality of projecting portions 20f are formed in the position shifted from the middle position of electric fuse part 20a, and, more concretely, are formed in the position distant from via 20d and near 20e. That is, projecting portions 10f and projecting portions 20f are arranged in the shape of zigzag.

    摘要翻译: 提供具有小占用面积的电直线状熔断器的半导体器件。 多个突出部10f形成在从电熔丝部10a的中间位置偏离的位置,更具体地,形成在远离通孔10e和靠近通孔10d的位置。 多个突出部20f形成在从电熔丝部20a的中间位置偏移的位置,更具体地,形成在远离通孔20d和靠近20e的位置。 也就是说,突出部分10f和突出部分20f被布置成Z字形。

    Semiconductor device and a method of increasing a resistance value of an electric fuse
    9.
    发明授权
    Semiconductor device and a method of increasing a resistance value of an electric fuse 有权
    半导体器件和增加电熔丝电阻值的方法

    公开(公告)号:US07745905B2

    公开(公告)日:2010-06-29

    申请号:US11683053

    申请日:2007-03-07

    IPC分类号: H01L29/86

    摘要: Provided is a semiconductor device having an electric fuse structure which receives the supply of an electric current to be permitted to be cut without damaging portions around the fuse. An electric fuse is electrically connected between an electronic circuit and a redundant circuit as a spare of the electronic circuit. After these circuits are sealed with a resin, the fuse can be cut by receiving the supply of an electric current from the outside. The electric fuse is formed in a fine layer, and is made of a main wiring and a barrier film. The linear expansion coefficient of each of the main wiring and the barrier film is larger than that of each of the insulator layers. The melting point of each of the main wiring and the barrier film is lower than that of each of the insulator layers.

    摘要翻译: 提供一种具有电熔丝结构的半导体器件,其接收要被允许切割的电流的供应,而不损坏保险丝周围的部分。 电子熔断器电连接在电子电路和冗余电路之间,作为电子电路的备用电路。 在这些电路用树脂密封之后,可以通过从外部接收电流来切断保险丝。 电熔丝形成为细层,由主配线和阻挡膜构成。 主布线和阻挡膜中的每一个的线膨胀系数大于每个绝缘体层的线膨胀系数。 主配线和阻挡膜中的每一个的熔点低于每个绝缘体层的熔点。

    SEMICONDUCTOR INTEGRATED CIRCUIT
    10.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT 审中-公开
    半导体集成电路

    公开(公告)号:US20080237787A1

    公开(公告)日:2008-10-02

    申请号:US11836609

    申请日:2007-08-09

    IPC分类号: H01L23/48

    摘要: The present invention aims at offering the semiconductor integrated circuit which can perform reliable relief processing using an electric fuse.The present invention is provided with a fuse wiring, a first electrode pad, a second electrode pad, a pollution-control layer, and a first via hole wiring and a second via hole wiring. And a fuse wiring is cut by passing beyond a predetermined current value. A first electrode pad is connected to one side of a fuse wiring. A second electrode pad is connected to the other of a fuse wiring. A pollution-control layer is formed in the upper layer and the lower layer of a fuse wiring via an insulating layer. It is formed via an insulating layer to the side surface of a fuse wiring, it connects with a pollution-control layer, and the first via hole wiring of a pair surrounds a fuse wiring. To a fuse wiring, the second via hole wiring of a pair is formed in the outside of a first via hole wiring so that a first via hole wiring may be surrounded.

    摘要翻译: 本发明的目的在于提供一种使用电熔丝进行可靠的浮雕处理的半导体集成电路。 本发明提供一种熔丝布线,第一电极焊盘,第二电极焊盘,污染控制层以及第一通孔布线和第二通孔布线。 并且通过超过预定电流值来切断熔丝布线。 第一电极焊盘连接到熔丝布线的一侧。 第二电极焊盘连接到熔丝布线中的另一个。 通过绝缘层在熔丝布线的上层和下层形成污染控制层。 它通过绝缘层形成在熔丝布线的侧面,它与污染控制层相连,一对第一通孔布线围绕熔丝布线。 对于熔丝布线,一对的第二通孔布线形成在第一通孔布线的外侧,使得可以包围第一通孔布线。