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16 条记录 (耗时 0.027 秒)

    Phase-locked loop detecting circuit
    5.
    发明授权
    Phase-locked loop detecting circuit 失效
    锁相环检测电路

    公开(公告)号：US4535306A

    公开(公告)日：1985-08-13

    申请号：US517554

    申请日：1983-07-27

    申请人： Tadahiro Yamaguchi ,  Ryuichi Naito

    发明人： Tadahiro Yamaguchi ,  Ryuichi Naito

    IPC分类号： H03M5/14 ,  H03L7/095 ,  H04L7/00 ,  H04L25/49 ,  H03L7/00

    CPC分类号： H03L7/095

    摘要： A circuit for detecting a proper locked state between the output of a phase-locked loop clock generating circuit and a timing component of a received composite signal containing both digital information and the timing component. An internal synchronization pulse signal is produced directly in response to the output of the phase-locked loop, and a frame synchronization sequence detection pulse signal is produced by detecting the occurrence of frame synchronization sequences in the composite signal. The internal synchronization pulse signal and the frame synchronization sequence detection pulse signal are compared to determine whether or not they are in time coincidence. If they are not, corresponding to an improperly locked state, a synchronization hunting controller controls the internal synchronization pulse generator to shift the phase of the internal synchronization pulse signal until time coincidence occurs. The output of the synchronization hunting controller is also used a lock detection signal. A frame synchronization signal is produced by delaying the output of the internal synchronization pulse generator.

    摘要翻译： 一种用于检测锁相环时钟产生电路的输出与包含数字信息和定时分量的接收复合信号的定时分量之间的适当锁定状态的电路。 响应于锁相环的输出直接产生内部同步脉冲信号，并且通过检测复合信号中帧同步序列的出现来产生帧同步序列检测脉冲信号。 比较内部同步脉冲信号和帧同步序列检测脉冲信号，以确定它们是否处于时间一致性。 如果不是，则对应于不正确的锁定状态，同步寻道控制器控制内部同步脉冲发生器来移位内部同步脉冲信号的相位，直到发生时间重合。 同步搜索控制器的输出也用于锁定检测信号。 通过延迟内部同步脉冲发生器的输出来产生帧同步信号。

    Audio signal compression and expansion system
    6.
    发明授权
    Audio signal compression and expansion system 失效
    音频信号压缩和扩展系统

    公开(公告)号：US4145664A

    公开(公告)日：1979-03-20

    申请号：US892356

    申请日：1978-03-31

    申请人： Saburo Takaoka ,  Fumihiko Yokogawa ,  Tadahiro Yamaguchi

    发明人： Saburo Takaoka ,  Fumihiko Yokogawa ,  Tadahiro Yamaguchi

    IPC分类号： H04B1/62 ,  G11B20/04 ,  H03G7/00 ,  H03G9/02 ,  H04B1/64 ,  H03G7/08

    CPC分类号： H04B1/64 ,  H03G9/025

    摘要： The auxilliary signal path in a compander system includes, in series, a first amplifier 7, a weighting function amplifier 8, and a detection circuit 9. The output of the latter controls the gain of a voltage-controlled variable gain circuit 11 also connected to the first amplifier output, and the integrated output of the variable gain circuit is fed back to the input of the first amplifier via a subtraction circuit 13 also supplied with the auxilliary signal path input. Alternatively, the first amplifier may comprise an operational amplifier, in which case the integrated signal is directly coupled to one of its inputs.

    摘要翻译： 压缩扩展器系统中的辅助信号路径包括串联的第一放大器7，加权函数放大器8和检测电路9.后者的输出控制也连接到的控制可变增益电路11的增益 第一放大器输出和可变增益电路的积分输出经由还具有辅助信号路径输入的减法电路13反馈到第一放大器的输入端。 或者，第一放大器可以包括运算放大器，在这种情况下，集成信号直接耦合到其输入之一。