公开(公告)号：US20130154087A1

公开(公告)日：2013-06-20

申请号：US13526216

申请日：2012-06-18

申请人： Yasuhito YOSHIMIZU ,  Satoshi Wakatsuki ,  Hisashi Okuchi ,  Atsuko Sakata ,  Hiroshi Tomita

发明人： Yasuhito YOSHIMIZU ,  Satoshi Wakatsuki ,  Hisashi Okuchi ,  Atsuko Sakata ,  Hiroshi Tomita

IPC分类号： H01L21/768 ,  H01L23/535

CPC分类号： C23C18/1608 ,  C23C18/1893 ,  C23C18/32 ,  H01L21/4846 ,  H01L21/76874 ,  H01L21/76879 ,  H01L21/76885 ,  H01L28/91

摘要： According to one embodiment, a method for forming an interconnection pattern includes forming an insulating pattern, forming a self-assembled film, and forming a conductive layer. The insulating pattern has a side surface on a major surface of a matrix. The self-assembled film has an affinity with a material of the insulating pattern on the side surface of the insulating pattern. The forming the conductive layer includes depositing a conductive material on a side surface of the self-assembled film.

摘要翻译： 根据一个实施例，用于形成互连图案的方法包括形成绝缘图案，形成自组装膜并形成导电层。 绝缘图案在矩阵的主表面上具有侧表面。 自组装膜与绝缘图案的侧面上的绝缘图案的材料具有亲和性。 形成导电层包括在自组装膜的侧表面上沉积导电材料。

公开(公告)号：US20130037055A1

公开(公告)日：2013-02-14

申请号：US13422771

申请日：2012-03-16

申请人： Yasuhito YOSHIMIZU ,  Hisashi Okuchi ,  Hiroshi Tomita

发明人： Yasuhito YOSHIMIZU ,  Hisashi Okuchi ,  Hiroshi Tomita

IPC分类号： A46B13/02 ,  B08B1/02 ,  B08B1/04

CPC分类号： A46B13/02 ,  A46B13/001 ,  A46B2200/30 ,  H01L21/67046 ,  H01L21/67754

摘要： Transferring plural semiconductor substrates under a state being held with predetermined intervals; holding the plural semiconductor substrates with roll brushes provided in plural pieces by each front side and back side of the plural semiconductor substrates, longitudinal directions of the roll brushes being oriented in parallel relative to the front side and the back side; and cleaning the plural semiconductor substrates by rotating the plural roll brushes.

摘要翻译： 在保持预定间隔的状态下转移多个半导体衬底; 通过多个半导体衬底的每个前侧和后侧保持多个具有多个片材的辊刷的半导体衬底，辊刷的纵向方向相对于前侧和后侧平行取向; 以及通过旋转所述多个辊刷来清洁所述多个半导体衬底。

公开(公告)号：US20210082950A1

公开(公告)日：2021-03-18

申请号：US16818742

申请日：2020-03-13

申请人： Yasuhito YOSHIMIZU

发明人： Yasuhito YOSHIMIZU

IPC分类号： H01L27/11582 ,  H01L27/11556 ,  G11C16/04 ,  H01L23/528 ,  H01L21/768

摘要： According to one embodiment, a semiconductor memory device includes: first and second interconnect layers; a plurality of third interconnect layers stacked between the first and second interconnect layers; a first insulating layer passing through the plurality of third interconnect layers, and including one end that is in contact with a first face of the first interconnect layer; a first memory pillar including a first semiconductor layer passing through the plurality of third interconnect layers and a charge storage layer provided between the plurality of third interconnect layers and the first semiconductor layer. A distance between a third face of the first interconnect layer opposite to the first face and the second interconnect layer in the first direction, differs at a position corresponding to the first insulating layer from at positions corresponding to the third interconnect layers.