公开(公告)号：US08270502B2

公开(公告)日：2012-09-18

申请号：US11956589

申请日：2007-12-14

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H04K1/10

CPC分类号： H04L27/2678 ,  H04L27/2649 ,  H04L27/266 ,  H04L27/2675

摘要： In one embodiment, a demodulator demodulates a multi-carrier modulated signal having two pilot tones. The demodulator calculates a first phase angle for the first pilot tone and a second phase angle for the second pilot tone based on the time-domain multi-carrier modulated signal. A timing-frequency offset estimate is calculated using the first and second phase angles. Further, a fine carrier-frequency offset estimate is calculated for each pilot tone based on the corresponding phase angle and the timing-frequency offset estimate. Each fine carrier-frequency offset estimate is combined with a coarse estimate and weighted. The weighted estimates are then combined. In further embodiments, the timing-frequency offset estimate is weighted and combined with a weighted timing-frequency offset estimate generated using a cyclic prefix. In yet further embodiments, the weighted carrier-frequency offset estimates are combined with a weighted carrier-frequency offset estimate generated using a cyclic prefix.

摘要翻译： 在一个实施例中，解调器解调具有两个导频音调的多载波调制信号。 解调器基于时域多载波调制信号计算第一导频音的第一相位角和第二导频音的第二相位角。 使用第一和第二相位角来计算定时频率偏移估计。 此外，基于对应的相位角和定时频率偏移估计，针对每个导频音计算精细的载波频率偏移估计。 每个精细载波频率偏移估计与粗估计和加权相结合。 然后将加权估计值合并。 在另外的实施例中，定时 - 频率偏移估计被加权并与使用循环前缀生成的加权定时 - 频率偏移估计组合。 在另外的实施例中，将加权的载波频率偏移估计与使用循环前缀生成的加权载波频率偏移估计进行组合。

公开(公告)号：US07359690B2

公开(公告)日：2008-04-15

申请号：US11133538

申请日：2005-05-20

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H04B1/06

CPC分类号： H03G3/3052 ,  H04B7/18523

摘要： A method and apparatus for automatically controlling the gain of a digital radio receiving circuit in which a single set of analogue amplifiers is used as the front end to feed two separate digital back-end, demodulating circuits, and in which, for optimal performance, each of the two digital demodulating circuits require the front end analogue amplifiers to operate over a significantly different dynamic range. An automatic-gain-control selector selects one of two automatic-gain control signals to set the gain of the analogue amplifier. In addition, the automatic-gain-control selector sets a compensatory gain of a digital automatic gain control in the back-end circuit not selected, so that the unselected demodulating circuit has substantially the same input signal as if it had been selected. In this way, both demodulating circuits can process the input signal as if they were in control of the analogue amplifier.

摘要翻译： 一种用于自动控制数字无线电接收电路的增益的方法和装置，其中使用单组模拟放大器作为前端来馈送两个单独的数字后端，解调电路，并且为了最佳性能，每个 两个数字解调电路需要前端模拟放大器在明显不同的动态范围内工作。 自动增益控制选择器选择两个自动增益控制信号之一来设置模拟放大器的增益。 此外，自动增益控制选择器设置未选择的后端电路中的数字自动增益控制的补偿增益，使得未选择的解调电路具有与被选择的输入信号基本相同的输入信号。 以这种方式，两个解调电路都可以像输入信号一样处理模拟放大器的控制。

公开(公告)号：US07277493B2

公开(公告)日：2007-10-02

申请号：US10352669

申请日：2003-01-28

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H04L27/28 ,  H04L1/00 ,  H04B1/10

CPC分类号： H04L27/2647 ,  H04L1/20 ,  H04L25/03159 ,  H04L25/067 ,  H04L2025/03414 ,  H04L2027/003 ,  H04L2027/0055 ,  H04L2027/0065

摘要： A COFDM demodulator providing independent DQPSK symbol amplitude and phase equalization provides improved soft-symbol estimates by reducing the possibility of clipping in the differential demodulator, improving the tolerance of the differential demodulator to finite word length effects, correcting for phase drifting between adjacent subcarriers, and improving signal-to-noise ratio (SNR) calculation accuracy for maximal ratio combining applications. Separate acquisition and tracking modes for the amplitude and phase equalizers are provided that handle start-up, reacquisition, and steady-state operation of the demodulator.

摘要翻译： 提供独立DQPSK符号幅度和相位均衡的COFDM解调器通过降低差分解调器中的限幅的可能性来提供改进的软符号估计，提高差分解调器对有限字长效应的容限，校正相邻子载波之间的相位漂移，以及 提高最大比组合应用的信噪比（SNR）计算精度。 提供用于幅度和相位均衡器的独立采集和跟踪模式，用于处理解调器的启动，重新采集和稳态操作。

公开(公告)号：US06594715B1

公开(公告)日：2003-07-15

申请号：US09433197

申请日：1999-11-03

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： G06F302

CPC分类号： H04L27/2626 ,  H04L25/0268 ,  H04L27/2647

摘要： A method and apparatus for interfacing ADSL modems to a codec, wherein a total of four frame buffers are used for receiving and transmitting data from and to the codec. The present invention also enables interoperability between ADSL modems that use 128 tones and those that use 256 tones.

摘要翻译： 一种用于将ADSL调制解调器与编解码器接口的方法和装置，其中总共四个帧缓冲器用于从编解码器接收和发送数据。 本发明还实现了使用128个音调的ADSL调制解调器和使用256个音调的ADSL调制解调器之间的互操作性。

公开(公告)号：US6118813A

公开(公告)日：2000-09-12

申请号：US962516

申请日：1997-10-31

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H04B14/04 ,  H04J3/12 ,  H04L25/49 ,  H03H7/30

CPC分类号： H04L25/4927 ,  H04B14/04 ,  H04J3/125

摘要： In a communications arrangement, a first pulse code modulation (PCM) modem communicates data in the form of PCM words with a second PCM modem through a public switched telephone network (PSTN). The transmitted data may be affected by robbed bit signaling imposed by the PSTN such that the least significant bits (LSBs) of certain PCM words are "robbed" and substituted with signaling bits. In accordance with the invention, any imposed robbed bit signaling is detected during training of the second PCM modem. The would-be PCM words affected by such robbed bit signaling are identified to the first PCM modem. The latter then avoids transmitting data using the LSBs of those PCM words. In addition, through the training, a decision feed-back equalizer in the second PCM modem is properly adjusted, taking into account any robbed bit signaling affecting the transmitted training data.

摘要翻译： 在通信布置中，第一脉冲编码调制（PCM）调制解调器通过公共交换电话网（PSTN）以PCM字形式通过第二PCM调制解调器传送数据。 发送的数据可能受到由PSTN施加的抢占位信令的影响，使得某些PCM字的最低有效位（LSB）被“抢”并被信令位替代。 根据本发明，在第二PCM调制解调器的训练期间检测到任何施加的抢夺位信令。 第一PCM调制解调器识别受这种抢占位信令影响的可能的PCM字。 后者则避免使用这些PCM字的LSB来发送数据。 另外，通过训练，可以适当地调整第二PCM调制解调器中的判决反馈均衡器，同时考虑到影响传输的训练数据的任何抢夺比特信令。

公开(公告)号：US07697911B2

公开(公告)日：2010-04-13

申请号：US11608449

申请日：2006-12-08

申请人： Yhean-Sen Lai ,  Robert C. Malkemes ,  Jie Song ,  Denis P. Orlando ,  Inseop Lee

发明人： Yhean-Sen Lai ,  Robert C. Malkemes ,  Jie Song ,  Denis P. Orlando ,  Inseop Lee

IPC分类号： H04B1/06

CPC分类号： H04H40/90

摘要： An SDARS receiver includes an analog front end configured to receive a composite signal. An A/D converter is coupled to the analog front end and converts the signal to a digitized signal. A digital down converter (DDC) is coupled to the A/D converter and down converts the digitized signal to a down converted signal. A demodulator demodulates the down converted signal. The receiver includes a digital automatic gain control (DAGC) coupled to an output of the A/D converter and before the demodulator. An automatic gain controller is coupled to the DAGC for providing an automatic gain control signal.

摘要翻译： SDARS接收机包括被配置为接收复合信号的模拟前端。 A / D转换器耦合到模拟前端，并将信号转换为数字化信号。 数字下变频器（DDC）耦合到A / D转换器，并将数字化信号下变频为下变频信号。 解调器解调下变频信号。 接收机包括耦合到A / D转换器的输出端和解调器之前的数字自动增益控制（DAGC）。 自动增益控制器耦合到DAGC以提供自动增益控制信号。

公开(公告)号：US07643812B2

公开(公告)日：2010-01-05

申请号：US11522689

申请日：2006-09-18

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H04B1/06 ,  H04B7/00

CPC分类号： H03G3/3078 ,  H03G3/3068

摘要： A single-path enhanced-algorithm digital automatic gain control (SDAGC) integrated receiver is presented. The SDAGC has a front-end RF/IF reception/processing block and associated RF/IF AGC, which outputs to a single ADC. Output from the ADC is split into two TDM and one COFDM signal pathways, each with a respective DAGC. The TDM DAGCs are controlled according to TDM post-power signals, while the COFDM, DAGC is controlled according to COFDM post- and pre-power signals. An IF Gain Decision block determines the RF/IF gain based upon the respective gains of the TDM and COFDM DAGCs. A Gain Distributor block then distributes the total gain of the system across the RF/IF AGC and the various DAGCs. To save power, the COFDM pathways may be disabled if the COFDM pre-power signal falls below a threshold value.

摘要翻译： 提出了一种单路增强算法数字自动增益控制（SDAGC）集成接收机。 SDAGC具有前端RF / IF接收/处理块和相关的RF / IF AGC，其输出到单个ADC。 ADC的输出分为两个TDM和一个COFDM信号通路，每个具有相应的DAGC。 TDM DAGC根据TDM后功率信号进行控制，而COFDM，DAGC根据COFDM后期和前期功率信号进行控制。 IF增益决定块根据TDM和COFDM DAGC的相应增益确定RF / IF增益。 然后，增益分配器块在RF / IF AGC和各种DAGC之间分配系统的总增益。 为了节省电力，如果COFDM预功率信号低于阈值，COFDM路径可能被禁用。

公开(公告)号：US20080139110A1

公开(公告)日：2008-06-12

申请号：US11608449

申请日：2006-12-08

申请人： Yhean-Sen Lai ,  Robert C. Malkemes ,  Jie Song ,  Denis P. Orlando ,  Inseop Lee

发明人： Yhean-Sen Lai ,  Robert C. Malkemes ,  Jie Song ,  Denis P. Orlando ,  Inseop Lee

IPC分类号： H04H20/74

CPC分类号： H04H40/90

摘要： An SDARS receiver includes an analog front end configured to receive a composite signal. An A/D converter is coupled to the analog front end and converts the signal to a digitized signal. A digital down converter (DDC) is coupled to the A/D converter and down converts the digitized signal to a down converted signal. A demodulator demodulates the down converted signal. The receiver includes a digital automatic gain control (DAGC) coupled to an output of the A/D converter and before the demodulator. An automatic gain controller is coupled to the DAGC for providing an automatic gain control signal.

摘要翻译： SDARS接收机包括被配置为接收复合信号的模拟前端。 A / D转换器耦合到模拟前端，并将信号转换为数字化信号。 数字下变频器（DDC）耦合到A / D转换器，并将数字化信号下变频为下变频信号。 解调器解调下变频信号。 接收机包括耦合到A / D转换器的输出端和解调器之前的数字自动增益控制（DAGC）。 自动增益控制器耦合到DAGC以提供自动增益控制信号。

公开(公告)号：US20060239393A1

公开(公告)日：2006-10-26

申请号：US11111616

申请日：2005-04-21

申请人： Yhean-Sen Lai ,  Robert Malkemes

发明人： Yhean-Sen Lai ,  Robert Malkemes

IPC分类号： H03D3/24

CPC分类号： H03L7/07 ,  H03L7/087 ,  H03L2207/50 ,  H04N21/242 ,  H04N21/4305

摘要： A dual loop, clock synchronization circuit for a receiver in a communication system. The circuitry uses a first loop of a digital phase lock loop for coarse synchronization to time stamps within the received data and uses a second loop for fine synchronization of a second numerically controlled oscillator.

公开(公告)号：US07042969B2

公开(公告)日：2006-05-09

申请号：US10047177

申请日：2002-01-15

申请人： Yhean-Sen Lai

发明人： Yhean-Sen Lai

IPC分类号： H03D1/06 ,  H03D11/04 ,  H03K5/01 ,  H03K6/04 ,  H04L25/08

CPC分类号： H04L27/2695 ,  H04L27/2656

摘要： A method and apparatus for determining frame alignment in a discrete multitone transceiver by determining a rotation of the coefficients of the shortening channel impulse response for which inter symbol interference (ISI) is minimal. The ISI is determined by multiplying the average value of a transmitted discrete multitone symbol and multiplying it by the coefficients of the shortening channel impulse response in a given rotation.