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    Current constricting phase change memory element structure
    5.
    发明授权
    Current constricting phase change memory element structure 有权
    电流限制相变存储元件结构

    公开(公告)号：US07932507B2

    公开(公告)日：2011-04-26

    申请号：US12727672

    申请日：2010-03-19

    申请人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    发明人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    IPC分类号： H01L29/02

    CPC分类号： B82Y10/00 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16

    摘要： A layer of nanoparticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.

    摘要翻译： 使用具有大约10nm的尺寸的纳米颗粒层形成电流收缩层或作为用于从下面的绝​​缘体层形成电流收缩层的硬掩模。 纳米颗粒优选在下面的表面上自对准和/或自平坦化。 电流收缩层可以形成在底部导电板内，在相变材料层内，在顶部导电板内，或在锥形衬垫之间的锥形衬里之间，锥形通孔侧壁和通孔插塞包含相变材料或顶部导电 材料。 电流收缩层周围的局部结构的电流密度高于周围区域，从而允许局部温度比周围材料高。 由于电流收缩层，减少编程相变存储器件所需的总电流以及编程晶体管的尺寸。

    Phase change memory random access device using single-element phase change material
    7.
    发明授权
    Phase change memory random access device using single-element phase change material 失效
    相变存储器随机存取装置采用单元相变材料

    公开(公告)号：US08378328B2

    公开(公告)日：2013-02-19

    申请号：US12036215

    申请日：2008-02-22

    申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Yi-Chou Chen ,  Chung H. Lam ,  Simone Raoux

    发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Yi-Chou Chen ,  Chung H. Lam ,  Simone Raoux

    IPC分类号： H01L29/02 ,  H01L47/00

    CPC分类号： H01L45/06 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/1226 ,  H01L45/14

    摘要： A phase change memory cell with a single element phase change thin film layer; and a first electrode and a second electrode coupled to the single element phase change thin film layer. A current flows from the first electrode to the single element phase change thin film layer, and through to the second electrode. The single element phase change thin film layer includes a single element phase change material. The single element phase change thin film layer can be less than 5 nanometers thick. The temperature of crystallization of the single element phase change material can be controlled by its thickness. In one embodiment, the single element phase change thin film layer is configured to be amorphous at room temperature (25 degrees Celsius). In one embodiment, the single element phase change thin film layer is comprised of Antimony (Sb).

    摘要翻译： 具有单个元件相变薄膜层的相变存储单元; 以及耦合到单个元件相变薄膜层的第一电极和第二电极。 A电流从第一电极流向单一元件相变薄膜层，并通过第二电极。 单元相变薄膜层包括单一元素相变材料。 单相相变薄膜层可以小于5纳米厚。 单元相变材料的结晶温度可以通过其厚度来控制。 在一个实施例中，单个元件相变薄膜层被配置为在室温（25摄氏度）下是无定形的。 在一个实施例中，单元相变薄膜层由锑（Sb）组成。

    Current constricting phase change memory element structure
    8.
    发明授权
    Current constricting phase change memory element structure 失效
    电流限制相变存储元件结构

    公开(公告)号：US07745807B2

    公开(公告)日：2010-06-29

    申请号：US11776301

    申请日：2007-07-11

    申请人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    发明人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    IPC分类号： H01L29/02

    CPC分类号： B82Y10/00 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16

    摘要： A layer of nanoparticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.

    摘要翻译： 使用具有大约10nm的尺寸的纳米颗粒层形成电流收缩层或作为用于从下面的绝​​缘体层形成电流收缩层的硬掩模。 纳米颗粒优选在下面的表面上自对准和/或自平坦化。 电流收缩层可以形成在底部导电板内，在相变材料层内，在顶部导电板内，或在锥形衬垫之间的锥形衬里之间，锥形通孔侧壁和通孔插塞包含相变材料或顶部导电 材料。 电流收缩层周围的局部结构的电流密度高于周围区域，从而允许局部温度比周围材料高。 由于电流收缩层，减少编程相变存储器件所需的总电流以及编程晶体管的尺寸。

    PHASE CHANGE MEMORY RANDOM ACCESS DEVICE USING SINGLE-ELEMENT PHASE CHANGE MATERIAL
    9.
    发明申请
    PHASE CHANGE MEMORY RANDOM ACCESS DEVICE USING SINGLE-ELEMENT PHASE CHANGE MATERIAL 失效
    使用单元相变材料的相变存储随机存取设备

    公开(公告)号：US20090212274A1

    公开(公告)日：2009-08-27

    申请号：US12036215

    申请日：2008-02-22

    申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Yi-Chou Chen ,  Chung H. Lam ,  Simone Raoux

    发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Yi-Chou Chen ,  Chung H. Lam ,  Simone Raoux

    IPC分类号： H01L45/00

    CPC分类号： H01L45/06 ,  G11C13/0004 ,  H01L27/2436 ,  H01L45/1226 ,  H01L45/14

    摘要： A phase change memory cell with a single element phase change thin film layer; and a first electrode and a second electrode coupled to the single element phase change thin film layer. A current flows from the first electrode to the single element phase change thin film layer, and through to the second electrode. The single element phase change thin film layer includes a single element phase change material. The single element phase change thin film layer can be less than 5 nanometers thick. The temperature of crystallization of the single element phase change material can be controlled by its thickness. In one embodiment, the single element phase change thin film layer is configured to be amorphous at room temperature (25 degrees Celsius). In one embodiment, the single element phase change thin film layer is comprised of Antimony (Sb).

    摘要翻译： 具有单个元件相变薄膜层的相变存储单元; 以及耦合到单个元件相变薄膜层的第一电极和第二电极。 A电流从第一电极流向单一元件相变薄膜层，并通过第二电极。 单元相变薄膜层包括单一元素相变材料。 单相相变薄膜层可以小于5纳米厚。 单元相变材料的结晶温度可以通过其厚度来控制。 在一个实施例中，单个元件相变薄膜层被配置为在室温（25摄氏度）下是无定形的。 在一个实施例中，单元相变薄膜层由锑（Sb）组成。

    CURRENT CONSTRICTING PHASE CHANGE MEMORY ELEMENT STRUCTURE
    10.
    发明申请
    CURRENT CONSTRICTING PHASE CHANGE MEMORY ELEMENT STRUCTURE 失效
    当前的相位变化记忆元素结构

    公开(公告)号：US20090014704A1

    公开(公告)日：2009-01-15

    申请号：US11776301

    申请日：2007-07-11

    申请人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    发明人： Chieh-Fang Chen ,  Shih Hung Chen ,  Yi-Chou Chen ,  Thomas Happ ,  Chia Hua Ho ,  Ming-Hsiang Hsueh ,  Chung Hon Lam ,  Hsiang-Lan Lung ,  Jan Boris Philipp ,  Simone Raoux

    IPC分类号： H01L29/04

    CPC分类号： B82Y10/00 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1273 ,  H01L45/143 ,  H01L45/144 ,  H01L45/148 ,  H01L45/16

    摘要： A layer of nanopaiticles having a dimension on the order of 10 nm is employed to form a current constricting layer or as a hardmask for forming a current constricting layer from an underlying insulator layer. The nanoparticles are preferably self-aligning and/or self-planarizing on the underlying surface. The current constricting layer may be formed within a bottom conductive plate, within a phase change material layer, within a top conductive plate, or within a tapered liner between a tapered via sidewall and a via plug contains either a phase change material or a top conductive material. The current density of the local structure around the current constricting layer is higher than the surrounding area, thus allowing local temperature to rise higher than surrounding material. The total current required to program the phase change memory device, and consequently the size of a programming transistor, is reduced due to the current constricting layer.

    摘要翻译： 使用具有大约10nm的尺寸的纳米颗粒层来形成电流收缩层或用作从底层绝缘体层形成电流收缩层的硬掩模。 纳米颗粒优选在下面的表面上自对准和/或自平坦化。 电流收缩层可以形成在底部导电板内，在相变材料层内，在顶部导电板内，或在锥形衬垫之间的锥形衬里之间，锥形通孔侧壁和通孔插塞包含相变材料或顶部导电 材料。 电流收缩层周围的局部结构的电流密度高于周围区域，从而允许局部温度比周围材料高。 由于电流收缩层，减少编程相变存储器件所需的总电流以及编程晶体管的尺寸。