公开(公告)号：US08421938B2

公开(公告)日：2013-04-16

申请号：US12788301

申请日：2010-05-27

申请人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

发明人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

IPC分类号： G02F1/136

CPC分类号： H01L27/12 ,  G02F1/136286 ,  G02F2201/40 ,  H01L27/124

摘要： A pixel array is located on a substrate and includes a plurality of pixel sets. Each of the pixel sets includes a first scan line, a second scan line, a data line, a data signal transmission line, a first pixel unit, and a second pixel unit. The data line is not parallel to the first and the second scan lines. The data signal transmission line is disposed parallel to the first and the second scan lines and electrically connected to the data line. Distance between the first and the second scan lines is smaller than distance between the data signal transmission line and one of the first and the second scan lines. The first pixel unit is electrically connected to the first scan line and the data line. The second pixel unit is electrically connected to the second scan line and the data line.

摘要翻译： 像素阵列位于衬底上并且包括多个像素组。 每个像素组包括第一扫描线，第二扫描线，数据线，数据信号传输线，第一像素单元和第二像素单元。 数据线不平行于第一和第二扫描线。 数据信号传输线平行于第一和第二扫描线设置并与数据线电连接。 第一和第二扫描线之间的距离小于数据信号传输线与第一和第二扫描线之一之间的距离。 第一像素单元电连接到第一扫描线和数据线。 第二像素单元电连接到第二扫描线和数据线。

公开(公告)号：US20110233567A1

公开(公告)日：2011-09-29

申请号：US12788301

申请日：2010-05-27

申请人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

发明人： Yi-Hui Li ,  Yu-Cheng Chen ,  Tsan-Chun Wang ,  Chih-Hung Lin ,  Tung-Huang Chen

IPC分类号： H01L33/00

CPC分类号： H01L27/12 ,  G02F1/136286 ,  G02F2201/40 ,  H01L27/124

摘要： A pixel array is located on a substrate and includes a plurality of pixel sets. Each of the pixel sets includes a first scan line, a second scan line, a data line, a data signal transmission line, a first pixel unit, and a second pixel unit. The data line is not parallel to the first and the second scan lines. The data signal transmission line is disposed parallel to the first and the second scan lines and electrically connected to the data line. Distance between the first and the second scan lines is smaller than distance between the data signal transmission line and one of the first and the second scan lines. The first pixel unit is electrically connected to the first scan line and the data line. The second pixel unit is electrically connected to the second scan line and the data line.

摘要翻译： 像素阵列位于衬底上并且包括多个像素组。 每个像素组包括第一扫描线，第二扫描线，数据线，数据信号传输线，第一像素单元和第二像素单元。 数据线不平行于第一和第二扫描线。 数据信号传输线平行于第一和第二扫描线设置并与数据线电连接。 第一和第二扫描线之间的距离小于数据信号传输线与第一和第二扫描线之一之间的距离。 第一像素单元电连接到第一扫描线和数据线。 第二像素单元电连接到第二扫描线和数据线。

公开(公告)号：US08471973B2

公开(公告)日：2013-06-25

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/36

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US20100315583A1

公开(公告)日：2010-12-16

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/1343 ,  H01L21/84

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US20110073862A1

公开(公告)日：2011-03-31

申请号：US12712209

申请日：2010-02-25

申请人： Yu-Cheng Chen ,  Chih-Hung Lin ,  Yi-Hui Li

发明人： Yu-Cheng Chen ,  Chih-Hung Lin ,  Yi-Hui Li

IPC分类号： H01L33/00 ,  H01L21/336

CPC分类号： H01L27/1288 ,  G02F1/13394 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L27/1214 ,  H01L27/1248

摘要： An array structure, which includes a TFT, a passivation layer, a pixel electrode, a first connecting layer and a first spacer is provided. The TFT includes a gate, a source and a drain. The passivation layer overlays the TFT. The pixel electrode is located on the passivation layer. The first connecting layer is located on the pixel electrode and electrically connected to the pixel electrode and the drain. The first spacer is located on the first connecting layer.

摘要翻译： 提供了包括TFT，钝化层，像素电极，第一连接层和第一间隔物的阵列结构。 TFT包括栅极，源极和漏极。 钝化层覆盖TFT。 像素电极位于钝化层上。 第一连接层位于像素电极上并与像素电极和漏极电连接。 第一间隔件位于第一连接层上。

公开(公告)号：US08872184B2

公开(公告)日：2014-10-28

申请号：US12712209

申请日：2010-02-25

申请人： Yu-Cheng Chen ,  Chih-Hung Lin ,  Yi-Hui Li

发明人： Yu-Cheng Chen ,  Chih-Hung Lin ,  Yi-Hui Li

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/12 ,  G02F1/1345 ,  G02F1/1339 ,  G02F1/1368 ,  G02F1/1362

CPC分类号： H01L27/1288 ,  G02F1/13394 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136231 ,  H01L27/1214 ,  H01L27/1248

摘要： An array structure, which includes a TFT, a passivation layer, a pixel electrode, a first connecting layer and a first spacer is provided. The TFT includes a gate, a source and a drain. The passivation layer overlays the TFT. The pixel electrode is located on the passivation layer. The first connecting layer is located on the pixel electrode and electrically connected to the pixel electrode and the drain. The first spacer is located on the first connecting layer.

摘要翻译： 提供了包括TFT，钝化层，像素电极，第一连接层和第一间隔物的阵列结构。 TFT包括栅极，源极和漏极。 钝化层覆盖TFT。 像素电极位于钝化层上。 第一连接层位于像素电极上并与像素电极和漏极电连接。 第一间隔件位于第一连接层上。

公开(公告)号：US20120057090A1

公开(公告)日：2012-03-08

申请号：US13030133

申请日：2011-02-18

申请人： Yu-Cheng Chen ,  Yi-Hui Li ,  Chih-Hung Lin ,  Maw-Song Chen

发明人： Yu-Cheng Chen ,  Yi-Hui Li ,  Chih-Hung Lin ,  Maw-Song Chen

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/133707

摘要： An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a gate insulating layer, a pixel electrode, a capacitor electrode, and a capacitor dielectric layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The gate insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the gate insulating layer. The capacitor dielectric layer is located between the capacitor electrode and the drain.

摘要翻译： 提供有源器件，像素结构和显示面板。 像素结构包括扫描线，数据线，有源器件，栅极绝缘层，像素电极，电容器电极和电容器电介质层。 有源器件包括栅极，沟道，源极和漏极。 栅极电连接到扫描线。 源电连接到数据线。 栅极绝缘层设置在栅极和沟道之间。 像素电极电连接到漏极。 电容电极位于栅极绝缘层上。 电容器电介质层位于电容器电极和漏极之间。

公开(公告)号：US08786815B2

公开(公告)日：2014-07-22

申请号：US13330627

申请日：2011-12-19

申请人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

发明人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

IPC分类号： G02F1/133 ,  G02F1/1368

CPC分类号： G02F1/133707 ,  G02F1/136213 ,  G02F2201/40

摘要： A display panel having a display region and a non-display region is provided. The display panel includes a plurality of pixel structures in the display region, and each pixel structure includes a scan line, a data line, a first active device, a pixel electrode, a first insulating layer, a capacitor electrode, and a second insulating layer. The first active device includes a first gate, a first channel, a first source, and a first drain. The second insulating layer covers the first insulating layer and the capacitor electrode and is located between the capacitor electrode and the first drain. At least one driving circuit is disposed in the non-display region and includes at least one second active device. Hence, a relatively thin insulating layer can be disposed between the capacitor electrode and the drain to reduce the area of the capacitor region and to achieve a desired aperture ratio.

摘要翻译： 提供具有显示区域和非显示区域的显示面板。 显示面板包括显示区域中的多个像素结构，并且每个像素结构包括扫描线，数据线，第一有源器件，像素电极，第一绝缘层，电容器电极和第二绝缘层 。 第一有源器件包括第一栅极，第一沟道，第一源极和第一漏极。 第二绝缘层覆盖第一绝缘层和电容器电极，并且位于电容器电极和第一漏极之间。 至少一个驱动电路设置在非显示区域中并且包括至少一个第二有源器件。 因此，可以在电容器电极和漏极之间设置相对薄的绝缘层，以减小电容器区域的面积并实现所需的孔径比。

公开(公告)号：US20120092240A1

公开(公告)日：2012-04-19

申请号：US13330627

申请日：2011-12-19

申请人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

发明人： Chih-Hung Lin ,  Wu-Liu Tsai ,  Chuan-Sheng Wei ,  Che-Chia Chang ,  Sheng-Chao Liu ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Maw-Song Chen

IPC分类号： G09G3/36 ,  H03B1/00

CPC分类号： G02F1/133707 ,  G02F1/136213 ,  G02F2201/40

摘要： An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a first insulating layer, a pixel electrode, a capacitor electrode, and a second insulating layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The first insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the first insulating layer. The second insulating layer is located between the capacitor electrode and the drain.

摘要翻译： 提供有源器件，像素结构和显示面板。 像素结构包括扫描线，数据线，有源器件，第一绝缘层，像素电极，电容器电极和第二绝缘层。 有源器件包括栅极，沟道，源极和漏极。 栅极电连接到扫描线。 源电连接到数据线。 第一绝缘层设置在栅极和沟道之间。 像素电极电连接到漏极。 电容电极位于第一绝缘层上。 第二绝缘层位于电容器电极和漏极之间。

公开(公告)号：US08456582B2

公开(公告)日：2013-06-04

申请号：US13030133

申请日：2011-02-18

申请人： Yu-Cheng Chen ,  Yi-Hui Li ,  Chih-Hung Lin ,  Maw-Song Chen

发明人： Yu-Cheng Chen ,  Yi-Hui Li ,  Chih-Hung Lin ,  Maw-Song Chen

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/133707

摘要： An active device, a pixel structure, and a display panel are provided. The pixel structure includes a scan line, a data line, an active device, a gate insulating layer, a pixel electrode, a capacitor electrode, and a capacitor dielectric layer. The active device includes a gate, a channel, a source, and a drain. The gate is electrically connected to the scan line. The source is electrically connected to the data line. The gate insulating layer is disposed between the gate and the channel. The pixel electrode is electrically connected to the drain. The capacitor electrode is located on the gate insulating layer. The capacitor dielectric layer is located between the capacitor electrode and the drain.

摘要翻译： 提供有源器件，像素结构和显示面板。 像素结构包括扫描线，数据线，有源器件，栅极绝缘层，像素电极，电容器电极和电容器电介质层。 有源器件包括栅极，沟道，源极和漏极。 栅极电连接到扫描线。 源电连接到数据线。 栅极绝缘层设置在栅极和沟道之间。 像素电极电连接到漏极。 电容电极位于栅极绝缘层上。 电容器电介质层位于电容器电极和漏极之间。