公开(公告)号：US06833081B2

公开(公告)日：2004-12-21

申请号：US10193502

申请日：2002-07-10

申请人： Yi-Nan Chen ,  Hui Min Mao ,  Shih-Chieh Kao ,  Tien-Sung Chen

发明人： Yi-Nan Chen ,  Hui Min Mao ,  Shih-Chieh Kao ,  Tien-Sung Chen

IPC分类号： B08B700

CPC分类号： H01L21/02071 ,  C23G1/125 ,  H01L21/31138 ,  H01L21/32136

摘要： A method of metal etching post cleaning. A substrate with a surface covered by a patterned metal layer and a patterned resist layer in order is provided, subsequently, oxygen-plasma ashing is performed to remove the patterned resist layer to expose the surface of the patterned metal layer. Next, an ozone-plasma ashing is performed to release charges on the surface of the patterned metal layer, the ozone-plasma ashing time at 30 sec˜180 sec, and the ozone-plasma ashing temperature at 200° C.˜300° C. The surface of the patterned metal layer is finally cleaned with sulfuric peroxide, molar concentration of sulfuric acid and hydrogen peroxide therein being 0.07M˜0.4M and 0.8M˜1.5M, respectively. In addition, the temperature of the sulfuric peroxide during post cleaning is 25° C.˜50° C.

摘要翻译： 金属蚀刻后清洗方法。 提供具有被图案化金属层和图案化抗蚀剂层覆盖的表面的衬底，随后执行氧等离子体灰化以去除图案化的抗蚀剂层以暴露图案化金属层的表面。 接下来，进行臭氧等离子体灰化以释放图案化金属层的表面上的电荷，30秒〜180秒的臭氧等离子体灰化时间，以及臭氧等离子体灰化温度在200℃〜300℃ 图案化金属层的表面最后用硫酸过氧化物，硫酸摩尔浓度和过氧化氢分别为0.07M〜0.4M和0.8M〜1.5M。 此外，后清洗时的硫酸过氧化物的温度为25℃〜50℃

公开(公告)号：US20050051191A1

公开(公告)日：2005-03-10

申请号：US10707081

申请日：2003-11-20

申请人： Shih-Chieh Kao ,  Jin-Tau Huang ,  Yi-Nan Chen

发明人： Shih-Chieh Kao ,  Jin-Tau Huang ,  Yi-Nan Chen

IPC分类号： B08B11/00 ,  H01L21/306 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L21/02063 ,  H01L21/76805 ,  H01L21/76814 ,  H01L21/76838

摘要： A cleaning method used in the fabrication of metallic interconnects is provided. A substrate having a conductive layer and a dielectric layer on the conductive layer is provided. An opening is formed in the dielectric layer. The opening exposes a portion of the conductive layer. The opening is cleaned using a mixture containing sulfuric acid and hydrogen peroxide. In this invention, the mixture containing sulfuric acid and hydrogen peroxide provides an effective means of removing the residues within the opening so that the electrical conductivity of a subsequently formed contact is improved.

摘要翻译： 提供了用于制造金属互连件的清洁方法。 提供了在导电层上具有导电层和电介质层的衬底。 在电介质层中形成开口。 开口暴露导电层的一部分。 使用含有硫酸和过氧化氢的混合物清洁开口。 在本发明中，含有硫酸和过氧化氢的混合物提供了去除开口内残留物的有效手段，从而提高随后形成的触点的导电性。

公开(公告)号：US06583641B2

公开(公告)日：2003-06-24

申请号：US09842039

申请日：2001-04-25

申请人： Mu-Chun Wang ,  Shih-Chieh Kao ,  Yu-Yiu Lin

发明人： Mu-Chun Wang ,  Shih-Chieh Kao ,  Yu-Yiu Lin

IPC分类号： G01R3102

CPC分类号： G01R31/2623

摘要： A gate dielectric breakdown test method is disclosed. The method includes performing a one step programmed VRDB test using Vcc voltage power source, gate current density for the corresponding ramped voltages are recorded. If the gate current density is found to be higher than a specified gate current density criterion, then the gate oxide is deemed to defective and is scrapped. And, if the gate current density (Jg) is found to be less than the specified gate current density criterion (Jc), then a differential gate current density ratio R=&Dgr;Jg/Jg for the corresponding ramped voltages are calculated. If the R value is found to be less than a specified differential current density ratio criterion (Rc), then the gate dielectric is considered to be robust, and if the R value is greater than the Rc value, then the gate dielectric is considered to be inflected. Accordingly, the voltage Vg can be effectively used for justifying the integrity of the gate dielectric.

摘要翻译： 公开了一种栅介质击穿测试方法。 该方法包括使用Vcc电压电源执行一步编程的VRDB测试，记录相应斜坡电压的栅极电流密度。 如果发现栅极电流密度高于指定的栅极电流密度标准，则认为栅极氧化物有缺陷并被报废。 并且，如果发现栅极电流密度（Jg）小于指定的栅极电流密度标准（Jc），则计算相应斜坡电压的差分栅极电流密度比R = DELTAJg / Jg。 如果发现R值小于指定的差分电流密度比准则（Rc），则认为栅极电介质是鲁棒的，并且如果R值大于Rc值，则栅极电介质被认为是 被拐弯 因此，电压Vg可以有效地用于证明栅极电介质的完整性。

公开(公告)号：US06483045B1

公开(公告)日：2002-11-19

申请号：US09626409

申请日：2000-07-26

申请人： Mu-Chun Wang ,  Shih-Chieh Kao ,  Shiang Huang-Lu ,  Yuan-Chang Liu

发明人： Mu-Chun Wang ,  Shih-Chieh Kao ,  Shiang Huang-Lu ,  Yuan-Chang Liu

IPC分类号： H05K111

CPC分类号： H01L23/528 ,  H01L23/5226 ,  H01L2924/0002 ,  H05K1/115 ,  H05K2201/0769 ,  H05K2201/0969 ,  H05K2201/0979 ,  H01L2924/00

摘要： A via plug layout structure for connecting different metallic layers. The structure includes a plurality of via plugs arranged in a fan-shaped pattern and a plurality of empty bars positioned between a single via plug and the fanned-out via plugs so that incoming current to the single via plug is equally distributed to every one of the fanned-out via plug and current stress in each fanned-out via plug is identical. Hence, via plugs having particularly serious electromigration problem can be discovered. In addition, single via plug having different critical dimension can be fabricated so that maximum critical dimension sustainable by the via plug is determined after an electromigration test.

摘要翻译： 用于连接不同金属层的通孔插头布局结构。 该结构包括布置成扇形图案的多个通孔塞和位于单个通孔插头和扇形通孔之间的多个空杆，使得到单个通孔塞的进入电流被均等地分配到 通过插头的每个扇形插头中的插头和电流应力都是相同的。 因此，可以发现通过具有特别严重的电迁移问题的插头。 此外，可以制造具有不同临界尺寸的单通孔塞，使得在电迁移测试之后确定由通孔插塞可持续的最大临界尺寸。

公开(公告)号：US06713673B2

公开(公告)日：2004-03-30

申请号：US10180052

申请日：2002-06-27

申请人： Shih-Chieh Kao

发明人： Shih-Chieh Kao

IPC分类号： H01B734

CPC分类号： H01B11/12

摘要： A structure of a speaker signal line having a middle filler layer, a plurality of transmission conductors and an outer coating portion, wherein, the middle filler layer is comprised of many hollow tubes. The transmission conductors are equidistantly spaced and wrapped over the middle filler layer. The coating portion is made of polyvinyl chloride composition. The middle filler lay is formed in the way of entangling to increase its strength and flexibility. The transmission conductors are spaced mutually in different layers and wrapped over the middle filler layer in mutual contrary directions. All the elements above are combined together by adding the outer coating portion, thereby, the inductive resistance induced by the transmission conductors equidistantly spaced in different layers and wrapped in mutual contrary directions can be mutually offset.

摘要翻译： 具有中间填充层，多个发送导体和外部涂覆部分的扬声器信号线的结构，其中，中间填充层由许多中空管构成。 传输导体等距离间隔并缠绕在中间填充层上。 涂布部分由聚氯乙烯组合物制成。 中间填料层以纠缠的方式形成，以增加其强度和柔韧性。 传输导体在不同层中相互间隔开，并且在相互相反的方向上缠绕在中间填充层上。 通过添加外涂层部分将上述所有元素组合在一起，从而可以相互抵消由等间距分布在不同层中并以相互相反方向包裹的传输导体感应的感应电阻。

公开(公告)号：US06932645B2

公开(公告)日：2005-08-23

申请号：US10748269

申请日：2003-12-31

申请人： Shih-Chieh Kao

发明人： Shih-Chieh Kao

IPC分类号： H01R9/05

CPC分类号： H01R9/0524 ,  H01R24/40 ,  H01R2103/00

摘要： A signal plug including an external sleeve, a line-connecting portion and a plug main-part. The line-connecting portion has two metallic end pieces separated by an insulation member, and a front end extending to form an insertion-connecting portion. The main-part includes the line-connecting portion inserted into a front end of an outer hard metallic receiving portion. The external sleeve is connected to the main-part with the insertion-connecting portion extending outwardly from the external sleeve. The outer receiving portion is made of phosphor bronze and will not deform during assembling. The inner line-connecting portion is made of high electric conductivity copper.

摘要翻译： 信号插头，其包括外部套筒，线路连接部分和插头主体部分。 线连接部分具有由绝缘构件隔开的两个金属端部件和延伸形成插入连接部分的前端。 主要部分包括插入外部硬金属接收部分前端的线连接部分。 外部套筒连接到主体部分，插入连接部分从外部套筒向外延伸。 外部容纳部由磷青铜制成，在组装时不会发生变形。 内线连接部由高导电性铜制成。

公开(公告)号：US06710243B2

公开(公告)日：2004-03-23

申请号：US10180037

申请日：2002-06-27

申请人： Shih-Chieh Kao

发明人： Shih-Chieh Kao

IPC分类号： H01B1102

CPC分类号： H01B11/002 ,  H01B3/441 ,  H01B3/443 ,  H01B3/445

摘要： A structure of signal line comprising a core portion, a middle filler layer, an obscuring layer and a coating portion, the core portion is a transmission conductor with a rectangular cross section; the obscuring layer has at least a knitted metallic obscuring layer; the coating portion has at least a layer made of polyvinyl chloride composition; and the middle filler layer is comprised of a plurality of hollow tubes. The core portion is tangled with the middle filler layer to make the line stronger in addition to being flexible, so that the line will not have the core portion damaged when it is bent to deform, plus the obscuring function of the obscuring layer, the interference among a magnetic field, radio frequencies and static electricity can be reduced, thereby, attenuation rate of the line can be reduced, distortion of the line can be smaller, and high quality of the line can be obtained.

摘要翻译： 信号线的结构包括芯部分，中间填充层，遮蔽层和涂覆部分，芯部是具有矩形横截面的传输导体; 遮蔽层至少具有编织的金属遮蔽层; 涂层部分至少具有由聚氯乙烯组合物制成的层; 并且中间填充层由多个中空管构成。 核心部分与中间填充层缠结，除了柔性之外还使线条更强，使得线在弯曲变形时不会使芯部损坏，加上遮蔽层的模糊功能，干扰 在磁场中，可以减少射频和静电，从而可以减少线路的衰减率，线路的失真可以更小，并且可以获得高质量的线路。

公开(公告)号：US06159864A

公开(公告)日：2000-12-12

申请号：US257172

申请日：1999-02-24

申请人： Mu-Chun Wang ,  Shih-Chung Li ,  Shih-Chieh Kao

发明人： Mu-Chun Wang ,  Shih-Chung Li ,  Shih-Chieh Kao

IPC分类号： H01L21/28 ,  H01L23/544 ,  H01L21/00

CPC分类号： H01L22/34 ,  H01L21/28123

摘要： The present invention provides a method for preventing gate oxides on a semiconductor wafer from being damaged by electromagnetic waves or particles generated in a plasma-related process. The semiconductor wafer comprises a substrate, a plurality of gate oxides positioned separately on the substrate, a first dielectric layer positioned on the gate oxides for isolating the gate oxides, and a conducting layer positioned on the first dielectric layer having at least one testing slit with a predetermined test pattern installed above each of the gate oxides. The method first performs a predetermined plasma-related process on the surface of the semiconductor wafer. Next, an electrical test is performed to find damaged gate oxides out of the gate oxides on the substrate. Based on damages of the damaged gate oxides, the predetermined plasma-related process is adjusted to prevent gate oxides on other semiconductor wafers from being damaged in the predetermined plasma-related process.

摘要翻译： 本发明提供一种防止半导体晶片上的栅极氧化物被等离子体相关工艺中产生的电磁波或微粒损坏的方法。 半导体晶片包括基板，分别位于基板上的多个栅极氧化物，位于用于隔离栅极氧化物的栅极氧化物上的第一介电层，以及位于第一介电层上的导电层，其具有至少一个具有 安装在每个栅极氧化物上方的预定测试图案。 该方法首先在半导体晶片的表面上执行预定的等离子体相关处理。 接下来，进行电气测试以从基板上的栅极氧化物中发现损坏的栅极氧化物。 基于损坏的栅极氧化物的损坏，调整预定的等离子体相关工艺以防止其它半导体晶片上的栅极氧化物在预定的等离子体相关工艺中被损坏。