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公开(公告)号:US08009432B2
公开(公告)日:2011-08-30
申请号:US11847300
申请日:2007-08-29
申请人: Ying Su , Wei Huang , I-Hsien Chiang
发明人: Ying Su , Wei Huang , I-Hsien Chiang
IPC分类号: H05K5/00
CPC分类号: H05K3/00 , H05K1/189 , H05K2203/0173 , H05K2203/085
摘要: An exemplary mounting support for a flexible printed circuit board is provided. The flexible printed circuit board has a side surface and at least one electronic component mounted on the side surface. The mounting support includes a first surface for contacting with the side surface of the flexible printed circuit board and a second surface on an opposite side of the mounting support to the first surface. The mounting support has at least one first recess defined in the first surface for receiving the at least one electronic component therein and at least one through-hole defined through the first surface and the second surface. The mounting support has at least one second recess defined in the second surface. The mounting support can fix a double surface mounted flexible printed circuit board flatly, thereby enhancing laser processing precision.
摘要翻译: 提供了一种用于柔性印刷电路板的示例性安装支撑件。 柔性印刷电路板具有侧表面和安装在侧表面上的至少一个电子部件。 安装支撑件包括用于与柔性印刷电路板的侧表面接触的第一表面和与安装支撑件相对的第一表面到第一表面的第二表面。 安装支撑件具有限定在第一表面中的至少一个第一凹部,用于容纳至少一个电子部件和至少一个通过第一表面和第二表面限定的通孔。 安装支架具有限定在第二表面中的至少一个第二凹部。 安装支架可以平整地固定双面安装的柔性印刷电路板,从而提高激光加工精度。
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公开(公告)号:US20090039895A1
公开(公告)日:2009-02-12
申请号:US12143632
申请日:2008-06-20
申请人: Li Xiao , I-Hsien Chiang , Chih-Yi Tu
发明人: Li Xiao , I-Hsien Chiang , Chih-Yi Tu
IPC分类号: G01R31/04
CPC分类号: G01R31/2812
摘要: A method of detecting faulty via holes of a printed circuit board. The printed circuit board including a number of electric trace segments. The method includes steps of: providing a testing system, the testing system comprising a processor, a storing means and a resistance measuring device, the storing means for storing a function Ymin=fmin(X) wherein X represents a reference resistance associated with a given electric trace segment, Ymin represents a minimum threshold value; measuring a resistance of an electric trace segment of a to-be-tested printed circuit board using the resistance measuring device, a to-be-tested via hole located on the electric trace segment; and judging whether the to-be-tested via hole is a faulty via hole according to the following criteria: if |Xa−X|≧Ymin, the to-be-tested via hole is a faulty via hole, and if |Xa−X|
摘要翻译: 一种检测印刷电路板故障通孔的方法。 印刷电路板包括多个电迹线段。 该方法包括以下步骤:提供测试系统,所述测试系统包括处理器,存储装置和电阻测量装置,所述存储装置用于存储功能Ymin = fmin(X),其中X表示与给定的相关联的参考电阻 电迹线段,Ymin表示最小阈值; 使用电阻测量装置测量待测试印刷电路板的电迹线段的电阻,该电阻测量装置是位于电迹线段上的待测试通孔; 并且根据以下标准判断被测试的通孔是否是故障的通孔:如果| Xa-X |> = Ymin,待测试的通孔是故障的通孔,如果| Xa -X |
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公开(公告)号:US07897055B2
公开(公告)日:2011-03-01
申请号:US11865619
申请日:2007-10-01
申请人: Chih-Yi Tu , Cheng-Hsien Lin , I-Hsien Chiang
发明人: Chih-Yi Tu , Cheng-Hsien Lin , I-Hsien Chiang
CPC分类号: H05K3/4697 , H05K3/0035 , H05K3/0038 , H05K3/0052 , H05K3/284 , H05K3/429 , H05K3/4652 , H05K3/4691 , H05K2201/09127 , H05K2203/063 , H05K2203/108 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165
摘要: The present inventions relates to a method for manufacturing a multilayer FPCB having different number of layers in different areas. The method includes the steps of: providing a binder layer; removing a portion of the binder layer thereby defining an opening in the binder layer; forming a multilayer FPCB which having a first copper clad laminate structure and a second copper clad laminate structure disposed on two opposite sides of the binder layer respectively using the binder layer; cutting the first copper clad laminate structure; cutting the multilayer FPCB in manner that a portion of first copper clad laminate structure that is exposed to the opening is separated from the first copper clad structure thereby obtain a multilayer FPCB having different number of layers in different areas.
摘要翻译: 本发明涉及一种制造在不同区域中具有不同层数的多层FPCB的方法。 该方法包括以下步骤:提供粘合剂层; 去除粘合剂层的一部分从而限定粘合剂层中的开口; 形成具有第一覆铜层压结构的多层FPCB和分别使用粘合剂层设置在粘合剂层的两个相对侧上的第二覆铜层压结构; 切割第一个覆铜层压结构; 以暴露于开口的第一覆铜层压体结构的一部分与第一铜包层结构体分离的方式切断多层FPCB,由此得到在不同区域中具有不同层数的多层FPCB。
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公开(公告)号:US20090045151A1
公开(公告)日:2009-02-19
申请号:US12055587
申请日:2008-03-26
申请人: Yong-Hui Feng , I-Hsien Chiang , Cheng-Hsien Lin
发明人: Yong-Hui Feng , I-Hsien Chiang , Cheng-Hsien Lin
IPC分类号: H05K13/00
CPC分类号: H05K13/0069
摘要: In one embodiment, a holder for holding printed circuit boards includes a base plate with a plurality of holding unit formed thereon. Each of the holding units includes a spring member, a securing member, and a blocking structure. The spring member includes a first end and a second end. The first end is attached to the base plate. The securing member is slideably mounted on the base plate. The securing member includes a connecting end and a securing end. The connecting end is connected with the second end of the spring member. The blocking structure is located on the base plate. The spring member is configured for pressing the securing member to move toward the blocking structure such that a printed circuit board is retainable between the securing end of the securing member and the blocking structure on the base plate. The holder is capable of holding printed circuit boards in batches.
摘要翻译: 在一个实施例中,用于保持印刷电路板的保持器包括在其上形成有多个保持单元的基板。 每个保持单元包括弹簧构件,固定构件和阻挡结构。 弹簧构件包括第一端和第二端。 第一端连接到基板。 固定构件可滑动地安装在基板上。 固定构件包括连接端和固定端。 连接端与弹簧构件的第二端连接。 阻挡结构位于基板上。 弹簧构件构造成用于按压固定构件朝向阻挡结构移动,使得印刷电路板可保持在固定构件的固定端和基板上的阻挡结构之间。 支架能够分批装载印刷电路板。
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公开(公告)号:US08049511B2
公开(公告)日:2011-11-01
申请号:US12143632
申请日:2008-06-20
申请人: Li Xiao , I-Hsien Chiang , Chih-Yi Tu
发明人: Li Xiao , I-Hsien Chiang , Chih-Yi Tu
IPC分类号: G01R31/08
CPC分类号: G01R31/2812
摘要: A method of detecting faulty via holes of a printed circuit board. The printed circuit board including a number of electric trace segments. The method includes steps of: providing a testing system, the testing system comprising a processor, a storing means and a resistance measuring device, the storing means for storing a function Ymin=fmin(X) wherein X represents a reference resistance associated with a given electric trace segment, Ymin represents a minimum threshold value; measuring a resistance of an electric trace segment of a to-be-tested printed circuit board using the resistance measuring device, a to-be-tested via hole located on the electric trace segment; and judging whether the to-be-tested via hole is a faulty via hole according to the following criteria: if |Xa−X|≧Ymin, the to-be-tested via hole is a faulty via hole, and if |Xa−X|
摘要翻译: 一种检测印刷电路板故障通孔的方法。 印刷电路板包括多个电迹线段。 该方法包括以下步骤:提供测试系统,所述测试系统包括处理器,存储装置和电阻测量装置,所述存储装置用于存储功能Ymin = fmin(X),其中X表示与给定的相关联的参考电阻 电迹线段,Ymin表示最小阈值; 使用电阻测量装置测量待测试印刷电路板的电迹线段的电阻,该电阻测量装置是位于电迹线段上的待测试通孔; 并且根据以下标准判断被测试的通孔是否是故障的通孔:如果| Xa-X |≥Ymin,待测试的通孔是故障的通孔,并且如果| Xa- X |
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公开(公告)号:US07916499B2
公开(公告)日:2011-03-29
申请号:US12055587
申请日:2008-03-26
申请人: Yong-Hui Feng , I-Hsien Chiang , Cheng-Hsien Lin
发明人: Yong-Hui Feng , I-Hsien Chiang , Cheng-Hsien Lin
CPC分类号: H05K13/0069
摘要: In one embodiment, a holder for holding printed circuit boards includes a base plate with a plurality of holding unit formed thereon. Each of the holding units includes a spring member, a securing member, and a blocking structure. The spring member includes a first end and a second end. The first end is attached to the base plate. The securing member is slideably mounted on the base plate. The securing member includes a connecting end and a securing end. The connecting end is connected with the second end of the spring member. The blocking structure is located on the base plate. The spring member is configured for pressing the securing member to move toward the blocking structure such that a printed circuit board is retainable between the securing end of the securing member and the blocking structure on the base plate. The holder is capable of holding printed circuit boards in batches.
摘要翻译: 在一个实施例中,用于保持印刷电路板的保持器包括在其上形成有多个保持单元的基板。 每个保持单元包括弹簧构件,固定构件和阻挡结构。 弹簧构件包括第一端和第二端。 第一端连接到基板。 固定构件可滑动地安装在基板上。 固定构件包括连接端和固定端。 连接端与弹簧构件的第二端连接。 阻挡结构位于基板上。 弹簧构件构造成用于按压固定构件朝向阻挡结构移动,使得印刷电路板可保持在固定构件的固定端和基板上的阻挡结构之间。 支架能够分批装载印刷电路板。
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