公开(公告)号：US5500387A

公开(公告)日：1996-03-19

申请号：US197439

申请日：1994-02-16

申请人： Yingsheng Tung ,  Robert E. Dixon ,  Shih-Hsin Ying

发明人： Yingsheng Tung ,  Robert E. Dixon ,  Shih-Hsin Ying

IPC分类号： H01L21/02 ,  H01L27/06 ,  H01L21/8242

CPC分类号： H01L28/20 ,  H01L27/0629 ,  H01L28/40 ,  Y10S438/981

摘要： A method of making an integrated circuit containing a capacitor comprising the steps of providing a semiconductor substrate having an active region and an oxide region on the substrate defining the active region, forming a mask on the active region, forming a region of heavily doped polysilicon on the oxide region having a doping level of from about 10 to about 15 ohms/square, removing the mask from the active region, commencing fabrication of an active device in the active region, forming a layer of electrically insulating material over the region of heavily doped polysilicon and a layer of electrically insulating material over the active region, forming a layer of heavily doped polysilicon having a doping level of from about 10 to about 15 ohms/square on the electrically insulating material to complete fabrication of the capacitor and on the active region and completing fabrication of an active device in the active region. More than one capacitor can be formed, this being accomplished by concurrently duplication of the above described process of forming a capacitor on another region of the substrate. The capacitors can have different capacitance by enlarging the insulating layer thereof, this being accomplished either by removal of oxide from or addition of oxide to one of the capacitors to the exclusion of the other during processing.

摘要翻译： 一种制造包含电容器的集成电路的方法，包括以下步骤：在限定有源区的衬底上提供具有有源区和氧化物区的半导体衬底，在有源区上形成掩模，形成重掺杂多晶硅区域 所述氧化物区域具有约10至约15欧姆/平方的掺杂水平，从有源区域移除掩模，开始在有源区域中制造有源器件，在重掺杂区域上形成电绝缘材料层 多晶硅和电绝缘材料层，在电绝缘材料上形成具有约10至约15欧姆/平方的掺杂水平的重掺杂多晶硅层，以完成电容器的制造和有源区 并且在有源区域中完成有源器件的制造。 可以形成多于一个的电容器，这通过在衬底的另一区域上形成电容器的上述工艺的同时复制来实现。 电容器可以通过扩大其绝缘层而具有不同的电容，这通过从处理中除去氧化物或氧化物添加到电容器之一来排除另外的电容来实现。

公开(公告)号：US06319848B1

公开(公告)日：2001-11-20

申请号：US08405063

申请日：1995-03-16

申请人： Andrej Litwin ,  Shih-Hsin Ying

发明人： Andrej Litwin ,  Shih-Hsin Ying

IPC分类号： H01L21441

CPC分类号： H01L21/02129 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/31625 ,  H01L21/76819

摘要： Lower reflow temperature in dielectrics is obtained by using a composite dielectric film. The composite dielectric film includes a first layer doped in the conventional range. A borophosphosilicate glass (BPSG) thick layer having concentrations of around 4.4 wt. % boron and around 5.6 wt. % phosphorus is exemplary. The composite dielectric film includes a second layer doped excessively. A BPSG thin layer having concentrations between 1-4 wt. % phosphorus and between 7-8 wt. % boron is exemplary. A capping layer of conventional dopant concentration may be additionally added to prevent outdiffusion. A composite dielectric BPSG film can be reflowed around 700° C. as compared to the typical 800-900° C. range. After reflow, etching away the second highly doped layer removes any potential adverse effects.

摘要翻译： 通过使用复合电介质膜获得电介质中较低的回流温度。 复合电介质膜包括在常规范围内掺杂的第一层。 硼磷硅酸盐玻璃（BPSG）厚层，其浓度约为4.4wt。 ％硼和约5.6wt。 ％磷是示例性的。 复合电介质膜包括过度掺杂的第二层。 BPSG薄层，其浓度在1-4wt。 ％磷和7-8wt。 ％硼是示例性的。 可以另外添加常规掺杂剂浓度的覆盖层以防止扩散。 与典型的800-900℃范围相比，复合电介质BPSG膜可以在大约700℃下回流。 在回流之后，蚀刻掉第二高掺杂层消除任何潜在的不利影响。