公开(公告)号：US06319848B1

公开(公告)日：2001-11-20

申请号：US08405063

申请日：1995-03-16

申请人： Andrej Litwin ,  Shih-Hsin Ying

发明人： Andrej Litwin ,  Shih-Hsin Ying

IPC分类号： H01L21441

CPC分类号： H01L21/02129 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02362 ,  H01L21/31625 ,  H01L21/76819

摘要： Lower reflow temperature in dielectrics is obtained by using a composite dielectric film. The composite dielectric film includes a first layer doped in the conventional range. A borophosphosilicate glass (BPSG) thick layer having concentrations of around 4.4 wt. % boron and around 5.6 wt. % phosphorus is exemplary. The composite dielectric film includes a second layer doped excessively. A BPSG thin layer having concentrations between 1-4 wt. % phosphorus and between 7-8 wt. % boron is exemplary. A capping layer of conventional dopant concentration may be additionally added to prevent outdiffusion. A composite dielectric BPSG film can be reflowed around 700° C. as compared to the typical 800-900° C. range. After reflow, etching away the second highly doped layer removes any potential adverse effects.

摘要翻译： 通过使用复合电介质膜获得电介质中较低的回流温度。 复合电介质膜包括在常规范围内掺杂的第一层。 硼磷硅酸盐玻璃（BPSG）厚层，其浓度约为4.4wt。 ％硼和约5.6wt。 ％磷是示例性的。 复合电介质膜包括过度掺杂的第二层。 BPSG薄层，其浓度在1-4wt。 ％磷和7-8wt。 ％硼是示例性的。 可以另外添加常规掺杂剂浓度的覆盖层以防止扩散。 与典型的800-900℃范围相比，复合电介质BPSG膜可以在大约700℃下回流。 在回流之后，蚀刻掉第二高掺杂层消除任何潜在的不利影响。

公开(公告)号：US20050047037A1

公开(公告)日：2005-03-03

申请号：US10874125

申请日：2004-06-22

申请人： Andrej Litwin ,  Ola Pettersson

发明人： Andrej Litwin ,  Ola Pettersson

IPC分类号： H01L20060101 ,  H01L27/02 ,  H02H9/00

CPC分类号： H01L27/0266 ,  H01L27/0288

摘要： A device for ESD protection of a high frequency circuit (1) of a semiconductor device comprises first (3) and second (4) p-type and first (6) and second (5) n-type JFET's, wherein the first p-type JFET (3) is connected with its gate to a high voltage source, its source to an input/output pad (2) of the semiconductor device, and its drain to the source of the first n-type JFET (6), the second p-type JFET (4) is connected with its gate to the high voltage source, its source to the drain of the second n-type JFET (5), and its drain to an input/output terminal of the circuit (1), the first n-type JFET transistor (6) is connected with its gate to ground (GND), and its drain to the input/output terminal, and the second n-type JFET transistor (5) is connected with its gate to ground (GND), and its source to the input/output pad (2).

摘要翻译： 用于半导体器件的高频电路（1）的ESD保护的器件包括第一（3）和第二（4）p型和第一（6）和第二（5）n型JFET，其中， 类型JFET（3）与其栅极连接到高电压源，其源极到半导体器件的输入/输出焊盘（2），并且其漏极到第一n型JFET（6）的源极， 第二p型JFET（4）与其栅极连接到高压源，其源极连接到第二n型JFET（5）的漏极，并且其漏极连接到电路（1）的输入/输出端子， ，第一n型JFET晶体管（6）与其栅极接地（GND）连接，其漏极连接到输入/输出端子，第二n型JFET晶体管（5）与其栅极连接 （GND），其源极到输入/输出焊盘（2）。

公开(公告)号：US06507047B2

公开(公告)日：2003-01-14

申请号：US09858902

申请日：2001-05-17

申请人： Andrej Litwin

发明人： Andrej Litwin

IPC分类号： H01L310312

CPC分类号： H01L29/0692 ,  H01L29/1608 ,  H01L29/812

摘要： A field effect transistor is made on a chip comprising a SiC-substrate. The transistor includes a plurality of densely stacked parallel transistor cells occupying totally a rectangular area. Each transistor cell has parallel strip-shaped regions forming the electrodes and active areas of the cell and each inner cell shares its drain and sources electrodes with neighbouring cells. In order to give a good power dissipation allowing an electrical high power of the transistor, the rectangular area has a very elongated shape and specifically it should have a width not larger than substantially 50 &mgr;m. In the rectangular area all the transistor cells have their strip-shaped regions located in parallel to short sides of the rectangular area and are generally very short considering the length of the rectangular area. Thus specifically also each cell has a length not larger than substantially 50 &mgr;m. The distances from the long sides of the rectangular area to the edges of the chip should be at least 50% and preferably 60% of the thickness of the chip to allow a good thermal flow out of the active rectangular area. A plurality of such very elongated active areas can be located on a single chip.

摘要翻译： 在包括SiC衬底的芯片上形成场效应晶体管。 晶体管包括占据整个矩形区域的多个密集堆叠的平行晶体管单元。 每个晶体管单元具有形成电极的平行条形区域和电池的有效区域，并且每个内部电池与相邻电池共享其漏极和源极。 为了提供允许晶体管的高功率的良好的功率耗散，矩形区域具有非常细长的形状，具体地，其宽度应不大于基本上为50μm。 在矩形区域中，所有晶体管单元的条形区域与矩形区域的短边平行，并且考虑到矩形区域的长度通常非常短。 因此，具体地，每个电池具有不大于基本上50μm的长度。 从矩形区域的长边到芯片的边缘的距离应至少为芯片厚度的50％，优选地为60％，以允许良好的热流出有源矩形区域。 多个这样非常细长的有源区域可以位于单个芯片上。

公开(公告)号：US07019382B2

公开(公告)日：2006-03-28

申请号：US10791389

申请日：2004-03-02

申请人： Andrej Litwin ,  Ola Pettersson

发明人： Andrej Litwin ,  Ola Pettersson

IPC分类号： H01L29/00

CPC分类号： H01L27/0251

摘要： To protect a high-frequency integrated circuit (1) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad (2), a semiconductor varistor (3) having low and essentially constant resistance for said normal operating voltages and higher resistance for said higher voltages is integrated between the bonding pad (2) and the input/output terminal together with the integrated circuit (1).

摘要翻译： 为了保护高频集成电路（1）免受连接到焊盘（2）的输入/输出端子上的正常工作电压的较高电压，对于所述正常工作电压具有低且基本上恒定的电阻的半导体压敏电阻（3） 并且所述较高电压的较高电阻与集成电路（1）一起集成在焊盘（2）和输入/输出端子之间。

公开(公告)号：US20060003727A1

公开(公告)日：2006-01-05

申请号：US11156982

申请日：2005-06-20

申请人： Andrej Litwin ,  Ganesh Kathiresan

发明人： Andrej Litwin ,  Ganesh Kathiresan

IPC分类号： H04B1/18 ,  H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0084 ,  H03D2200/009

摘要： An RF front-end receiver comprises a low noise amplifier and a local oscillator driver, which are connected to respective input ports of a mixer which comprises a first and second transistor with gates coupled to one output terminal, a third and fourth transistor with gates coupled to the other output terminal, a fifth and sixth transistor with gates coupled to respective output terminal of the local oscillator driver, the sources of the first and third transistors coupled to the drain of the fifth transistor, the sources of the second and fourth transistor coupled to the drain of the sixth transistor, the sources of the fifth and sixth transistor coupled to ground, the drains of the first and fourth transistor coupled to one output terminal of a mixer output port, and the drains of the second and third transistor coupled to the other output terminal of the mixer output port.

摘要翻译： RF前端接收机包括低噪声放大器和本地振荡器驱动器，其连接到混频器的相应输入端口，混频器包括具有耦合到一个输出端子的栅极的第一和第二晶体管，栅极耦合的第三和第四晶体管 到另一个输出端，具有耦合到本地振荡器驱动器的相应输出端的栅极的第五和第六晶体管，耦合到第五晶体管的漏极的第一和第三晶体管的源极，第二和第四晶体管的源极耦合 到第六晶体管的漏极，第五和第六晶体管的源极耦合到地，第一和第四晶体管的漏极耦合到混频器输出端口的一个输出端，并且第二和第三晶体管的漏极耦合到 混频器输出端口的另一个输出端子。

公开(公告)号：US20050112822A1

公开(公告)日：2005-05-26

申请号：US10947801

申请日：2004-09-23

申请人： Andrej Litwin

发明人： Andrej Litwin

IPC分类号： H01L20060101 ,  H01L21/265 ,  H01L21/336 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78

CPC分类号： H01L29/0653 ,  H01L21/26586 ,  H01L29/0878 ,  H01L29/1083 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7835

摘要： A method in the fabrication of an integrated high frequency circuit including a DMOS transistor device comprises the steps of providing a substrate, etching a trench in a region defined for an extended drain for the DMOS transistor, and doping a region below the trench and a region at a side of the trench to a first doping type by means of ion implantation in the etched open trench through a mask, wherein the ion implantation is effectuated in a direction, which is inclined at an angle to the normal of the surface of the substrate, to thereby create a partly lateral and partly vertical current path in the extended drain. The method comprises further the steps of filling the trench with an insulating material to form a shallow trench isolation region, and forming a gate, a channel region, a source, and a drain for the DMOS transistor.

摘要翻译： 制造包括DMOS晶体管器件的集成高频电路的方法包括以下步骤：提供衬底，在限定用于DMOS晶体管的扩展漏极的区域中蚀刻沟槽，以及掺杂沟槽下方的区域和区域 在通过掩模在蚀刻的开放沟槽中借助于离子注入到第一掺杂类型的沟槽的一侧，其中离子注入沿着与衬底的表面的法线成一角度倾斜的方向实现 ，从而在延伸的漏极中产生部分横向和部分垂直的电流路径。 该方法还包括以下步骤：用绝缘材料填充沟槽以形成浅沟槽隔离区，以及为DMOS晶体管形成栅极，沟道区，源极和漏极。

公开(公告)号：US6100770A

公开(公告)日：2000-08-08

申请号：US150231

申请日：1998-09-09

申请人： Andrej Litwin ,  Sven Erik Mattisson

发明人： Andrej Litwin ,  Sven Erik Mattisson

IPC分类号： H01L20060101 ,  H01L29/93 ,  H01L29/94 ,  H03B5/12 ,  H03K3/354

CPC分类号： H03K3/354 ,  H01L29/94 ,  H03B5/1215 ,  H03B5/1228 ,  H03B5/1253 ,  H03B2200/0098

摘要： An electrical device having a voltage dependent capacitance is provided comprising a first region of a semiconductor material, and a second region and a third region of a semiconductor material formed in the first region, the second and third regions being separated by a separation region, and an electrically insulating layer formed on the first region at least at a region corresponding to the separation region, and a substantially conductive element formed on the insulating layer at least at a region corresponding to the separation region such that the insulating layer electrically insulates the substantially conductive element from the first, second and third regions, and a first electrode connected to the substantially conductive element, and a second electrode and third electrode are connected to the second and third regions. A method of manufacturing the device is also disclosed.

摘要翻译： 提供具有电压相关电容的电气装置，其包括半导体材料的第一区域和形成在第一区域中的第二区域和半导体材料的第三区域，第二和第三区域被分离区域分开，以及 至少在对应于分离区域的区域上形成在第一区域上的电绝缘层，以及至少在对应于分离区域的区域上形成在绝缘层上的基本上导电的元件，使得绝缘层将绝缘层电绝缘 元件和与第一，第二和第三区域连接的第一电极，第二电极和第三电极连接到第二和第三区域。 还公开了一种制造该器件的方法。

公开(公告)号：US5432377A

公开(公告)日：1995-07-11

申请号：US185146

申请日：1994-01-24

申请人： Andrej Litwin

发明人： Andrej Litwin

IPC分类号： H01L21/337 ,  H01L21/84 ,  H01L27/07 ,  H01L27/12 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L29/808 ,  H01L27/04

CPC分类号： H01L29/7824 ,  H01L21/84 ,  H01L27/0705 ,  H01L27/1203 ,  H01L29/1058 ,  H01L29/66901 ,  H01L29/7801 ,  H01L29/7832 ,  H01L29/808 ,  H01L29/8086 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/785 ,  Y10S148/05

摘要： A semiconductor device is supported by a semiconductor body which comprises a substrate, an oxide layer and a weakly doped monocrystalline wafer. Trenches for a dielectrically isolating layer which surrounds a component region are etched in the wafer. A field effect transistor in the component region has two doped wafer-line gate regions, which have been diffused in the component region with the aid of a first mask. Two heavily doped regions are diffused in the component region with the aid of a second mask, these regions forming the source region and the drain region of the transistor. The semiconductor body is easy to produce and is available commercially, which simplifies manufacture of the field effect transistor. Manufacture is also simplified because the configuration of both the component region and the parts of the transistor are determined by the simple choice of masks. The component region is weakly doped and is easy to deplete of charge carriers. The electrical field strength in the component region is weak, according to the RESURF method, and the field effect transistor withstands high voltages without risk of current breakthrough. The component region occupies only a relatively small area on the substrate.

摘要翻译： 半导体器件由包括衬底，氧化物层和弱掺杂单晶晶片的半导体本体支撑。 在晶片中蚀刻围绕元件区域的介电隔离层的沟槽。 分量区域中的场效应晶体管具有借助于第一掩模而在分量区域中扩散的两个掺杂晶片线栅极区域。 借助于第二掩模，两个重掺杂区域在分量区域中扩散，这些区域形成晶体管的源极区域和漏极区域。 半导体本体容易制造并且可商购，这简化了场效应晶体管的制造。 制造也是简化的，因为组件区域和晶体管的部件的配置由简单的掩模选择决定。 组分区域是弱掺杂的，容易耗尽电荷载体。 根据RESURF方法，分量区域的电场强度较弱，场效应晶体管承受高电压，没有电流突破的风险。 部件区域在基板上仅占据较小的面积。

公开(公告)号：US07379727B2

公开(公告)日：2008-05-27

申请号：US11156982

申请日：2005-06-20

申请人： Andrej Litwin ,  Ganesh Kathiresan

发明人： Andrej Litwin ,  Ganesh Kathiresan

IPC分类号： H04B1/26

CPC分类号： H03D7/1441 ,  H03D7/1458 ,  H03D2200/0084 ,  H03D2200/009

摘要： An RF front-end receiver comprises a low noise amplifier and a local oscillator driver, which are connected to respective input ports of a mixer which comprises a first and second transistor with gates coupled to one output terminal, a third and fourth transistor with gates coupled to the other output terminal, a fifth and sixth transistor with gates coupled to respective output terminal of the local oscillator driver, the sources of the first and third transistors coupled to the drain of the fifth transistor, the sources of the second and fourth transistor coupled to the drain of the sixth transistor, the sources of the fifth and sixth transistor coupled to ground, the drains of the first and fourth transistor coupled to one output terminal of a mixer output port, and the drains of the second and third transistor coupled to the other output terminal of the mixer output port.

摘要翻译： RF前端接收机包括低噪声放大器和本地振荡器驱动器，其连接到混频器的相应输入端口，混频器包括具有耦合到一个输出端子的栅极的第一和第二晶体管，栅极耦合的第三和第四晶体管 到另一个输出端，具有耦合到本地振荡器驱动器的相应输出端的栅极的第五和第六晶体管，耦合到第五晶体管的漏极的第一和第三晶体管的源极，第二和第四晶体管的源极耦合 到第六晶体管的漏极，第五和第六晶体管的源极耦合到地，第一和第四晶体管的漏极耦合到混频器输出端口的一个输出端，并且第二和第三晶体管的漏极耦合到 混频器输出端口的另一个输出端子。

公开(公告)号：US07098741B2

公开(公告)日：2006-08-29

申请号：US10882868

申请日：2004-07-01

申请人： Andrej Litwin ,  Paul Andersson

发明人： Andrej Litwin ,  Paul Andersson

IPC分类号： H03F3/68

CPC分类号： H03F1/302 ,  H03F3/19

摘要： A monolithically integrated microwave amplifier device, comprises an input for receiving a microwave signal, a first power amplifier stage (11; 32) having an input coupled to receive the microwave signal, an impedance matching network (16; 39) coupled to an output of the first power amplifier stage, a second power amplifier stage (12; 33) having an input coupled to the impedance matching network, and an output for outputting the microwave signal after having been amplified by the first and second power amplifier stages, wherein the first power amplifier stage is optimized to be supplied with a first supply voltage (13; 35), which is essentially lower than a second supply voltage (14; 36), with which the second power amplifier stage is optimized to be supplied. Preferably, the second stage is an end stage based on an LDMOS transistor, and the first stage is a driver stage based on a bipolar transistor.

摘要翻译： 一种单片集成微波放大器装置，包括用于接收微波信号的输入端，具有耦合以接收微波信号的输入端的第一功率放大器级（11; 32），耦合到 所述第一功率放大器级，具有耦合到所述阻抗匹配网络的输入的第二功率放大器级（12; 33）和用于在由所述第一和第二功率放大器级放大之后输出微波信号的输出，其中所述第一功率放大器级 功率放大器级被优化以提供第一电源电压（13; 35），其基本上低于第二电源电压（14; 36），第二功率放大器级被优化以供应。 优选地，第二级是基于LDMOS晶体管的端级，并且第一级是基于双极晶体管的驱动级。