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公开(公告)号:US06522576B2
公开(公告)日:2003-02-18
申请号:US09992213
申请日:2001-11-14
申请人: Yong Lu , Theodore Zhu , Romney R. Katti
发明人: Yong Lu , Theodore Zhu , Romney R. Katti
IPC分类号: G11C1100
CPC分类号: G11C11/5607 , G11C7/06 , G11C11/15
摘要: A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.
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公开(公告)号:US06363007B1
公开(公告)日:2002-03-26
申请号:US09638415
申请日:2000-08-14
申请人: Yong Lu , Romney R. Katti
发明人: Yong Lu , Romney R. Katti
IPC分类号: G11C1100
摘要: Methods are disclosed for writing magneto-resistive memory devices. Some of the methods help reduce peak currents during a write, while others increase the speed of the write. To reduce the peak currents, selected control signals such as selected word lines, digital lines and/or sense lines are sequentially activated, rather than activated in parallel. Because the word lines, digital lines and/or sense lines are sequentially activated, the peak currents experienced during a corresponding write may be reduced. To increase the speed of a write, the magnetization vector of the magneto-resistive bits are actively forced to be substantially parallel with the major axis of the magneto-resistive bits, rather than merely drift to that position under the forces inherent in the magneto-resistive bit.
摘要翻译: 公开了用于写入磁阻存储器件的方法。 一些方法有助于在写入期间减少峰值电流,而其他方法可以提高写入速度。 为了降低峰值电流,所选择的控制信号(例如所选字线,数字线和/或感测线)被顺序激活,而不是并行激活。 由于字线,数字线和/或感测线被顺序地激活,所以在相应写入期间经历的峰值电流可能会降低。 为了增加写入速度,磁阻位的磁化矢量被主动强制为与磁阻位的主轴基本平行,而不仅仅是在磁光位固有的力下漂移到该位置, 电阻位。
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公开(公告)号:US06717194B2
公开(公告)日:2004-04-06
申请号:US09999684
申请日:2001-10-30
申请人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
发明人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
IPC分类号: H01L31119
摘要: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
摘要翻译: 公开了一种用于磁阻存储器的磁头结构,其具有足够大的位端以适应最小尺寸的接触或通孔。 通过提供这种布置,可以使用常规的接触和/或通孔处理步骤来制造磁头结构。 因此,可以降低制造装置的成本,并且可以提高总体可实现的产量。
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公开(公告)号:US06493258B1
公开(公告)日:2002-12-10
申请号:US09618237
申请日:2000-07-18
申请人: Yong Lu , Theodore Zhu , Romney R. Katti
发明人: Yong Lu , Theodore Zhu , Romney R. Katti
IPC分类号: G11C1100
CPC分类号: G11C11/5607 , G11C7/06 , G11C11/15
摘要: A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.
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公开(公告)号:US07372723B1
公开(公告)日:2008-05-13
申请号:US11464049
申请日:2006-08-11
申请人: Yong Lu , Romney R. Katti
发明人: Yong Lu , Romney R. Katti
IPC分类号: G11C11/00
CPC分类号: G11C11/005 , G11C14/0036 , G11C14/0081
摘要: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. In an embodiment, a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner is provided.
摘要翻译: 半导体行业旨在通过改进的非易失性存储设备降低传统易失性存储设备的风险。 对于显着提升,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 在一个实施例中,提供了可以与常规的基于半导体的计算,逻辑和存储器装置集成以保持易失性逻辑状态和/或非易失性方式的易失性数字信息的保存在掉电电路。
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公开(公告)号:US07029923B2
公开(公告)日:2006-04-18
申请号:US10734663
申请日:2003-12-11
申请人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
发明人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
IPC分类号: H01L21/00
摘要: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
摘要翻译: 公开了一种用于磁阻存储器的磁头结构,其具有足够大的位端以适应最小尺寸的接触或通孔。 通过提供这种布置,可以使用常规的接触和/或通孔处理步骤来制造磁头结构。 因此,可以降低制造装置的成本,并且可以提高总体可实现的产量。
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公开(公告)号:US06972988B1
公开(公告)日:2005-12-06
申请号:US10637145
申请日:2003-08-08
申请人: Yong Lu , Romney R. Katti
发明人: Yong Lu , Romney R. Katti
CPC分类号: G11C5/14 , G11C5/144 , G11C11/16 , Y10T307/527
摘要: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. A non-volatile logic state retention devices, such as GMR storage elements, and concerns a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner.
摘要翻译: 半导体行业旨在通过改进的非易失性存储设备降低传统易失性存储设备的风险。 对于显着提升,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 非易失性逻辑状态保持装置,例如GMR存储元件,并且涉及可以与常规的基于半导体的计算,逻辑和存储器装置集成的保存在掉电电路以保持易失性逻辑状态和/或 不稳定的数字信息。
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公开(公告)号:US06765820B2
公开(公告)日:2004-07-20
申请号:US10352278
申请日:2003-01-27
申请人: Yong Lu , Theodore Zhu , Romney R. Katti
发明人: Yong Lu , Theodore Zhu , Romney R. Katti
IPC分类号: G11C1100
CPC分类号: G11C11/5607 , G11C7/06 , G11C11/15
摘要: A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.
摘要翻译: 公开了一种低功率高速磁阻存储器。 所公开的存储器直接感测一个或多个磁阻存储元件的电阻状态。 这允许在单个读取周期期间读取存储器,而不需要字线电流。 这可能会显着增加速度并降低存储器的功率。
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公开(公告)号:US07092285B1
公开(公告)日:2006-08-15
申请号:US10992052
申请日:2004-11-18
申请人: Yong Lu , Romney R. Katti
发明人: Yong Lu , Romney R. Katti
IPC分类号: G11C11/00
CPC分类号: G11C5/14 , G11C5/144 , G11C11/16 , Y10T307/527
摘要: The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated giant-magneto-resistive (GMR) structures. The present invention relates to non-volatile logic state retention devices, such as GMR storage elements, and concerns a save-on-power-down circuit that may be integrated with conventional semiconductor-based computing, logic, and memory devices to retain volatile logic states and/or volatile digital information in a non-volatile manner.
摘要翻译: 半导体行业旨在通过改进的非易失性存储设备降低传统易失性存储设备的风险。 对于显着提升,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 本发明涉及诸如GMR存储元件的非易失性逻辑状态保持器件,并且涉及可以与常规的基于半导体的计算,逻辑和存储器件集成以保存易失性逻辑的保存在掉电电路 状态和/或易失性数字信息。
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公开(公告)号:US06872997B2
公开(公告)日:2005-03-29
申请号:US10765546
申请日:2004-01-26
申请人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
发明人: Harry Liu , William Larson , Lonny Berg , Theodore Zhu , Shaoping Li , Romney R. Katti , Yong Lu , Anthony Arrott
IPC分类号: H01L27/105 , G11C11/15 , H01L21/8246 , H01L43/08 , H01L43/12 , H01L31/119
摘要: A magnetic bit structure for a magneto-resistive memory is disclosed that has bit ends that are sufficiently large to accommodate a minimum size contact or via hole. By providing such an arrangement, the magnetic bit structure may be fabricated using conventional contact and/or via processing steps. As such, the cost of manufacturing the device may be reduced, and the overall achievable yield may be increased.
摘要翻译: 公开了一种用于磁阻存储器的磁头结构,其具有足够大的位端以适应最小尺寸的接触或通孔。 通过提供这种布置,可以使用常规的接触和/或通孔处理步骤来制造磁头结构。 因此,可以降低制造装置的成本,并且可以提高总体可实现的产量。
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