公开(公告)号：US07853091B2

公开(公告)日：2010-12-14

申请号：US11220752

申请日：2005-09-07

申请人： Yong-Mi Lee ,  Deuk-Soo Jung ,  Chang-Young Jung ,  Jung-Sun Kang

发明人： Yong-Mi Lee ,  Deuk-Soo Jung ,  Chang-Young Jung ,  Jung-Sun Kang

IPC分类号： G06K9/36 ,  G06K9/46

CPC分类号： H04N19/433 ,  H04N5/145 ,  H04N19/52

摘要： A motion-vector operation device includes an upper memory composed of first and second banks that store motion vectors of a lower block group belonging to a macroblock, a left memory storing motion vectors of a right block group belonging to a macroblock, and an estimator predicting a motion vector of a current block with reference to the motion vectors stored in the first and second banks of the upper memory and the left memory in accordance with an operation mode and a position of the current block in a super macroblock.

摘要翻译： 运动矢量运算装置包括由存储属于宏块的下方块组的运动矢量的第一和第二组构成的上部存储器，存储属于宏块的右侧块组的运动矢量的左侧存储器和预测的估计量 根据当前块在超宏块中的操作模式和位置​​，参考存储在上部存储器和左侧存储器的第一和第二组中的运动矢量的当前块的运动矢量。

公开(公告)号：US20060140275A1

公开(公告)日：2006-06-29

申请号：US11220752

申请日：2005-09-07

申请人： Yong-Mi Lee ,  Deuk-Soo Jung ,  Chang-Young Jung ,  Jung-Sun Kang

发明人： Yong-Mi Lee ,  Deuk-Soo Jung ,  Chang-Young Jung ,  Jung-Sun Kang

IPC分类号： H04N11/02 ,  H04N11/04 ,  H04N7/12 ,  H04B1/66

CPC分类号： H04N19/433 ,  H04N5/145 ,  H04N19/52

摘要： A motion-vector operation device includes an upper memory composed of first and second banks that store motion vectors of a lower block group belonging to a macroblock, a left memory storing motion vectors of a right block group belonging to a macroblock, and an estimator predicting a motion vector of a current block with reference to the motion vectors stored in the first and second banks of the upper memory and the left memory in accordance with an operation mode and a position of the current block in a super macroblock.

摘要翻译： 运动矢量运算装置包括由存储属于宏块的下方块组的运动矢量的第一和第二组构成的上部存储器，存储属于宏块的右侧块组的运动矢量的左侧存储器和预测的估计量 根据当前块在超宏块中的操作模式和位置​​，参考存储在上部存储器和左侧存储器的第一和第二组中的运动矢量的当前块的运动矢量。

公开(公告)号：US08180195B2

公开(公告)日：2012-05-15

申请号：US12071857

申请日：2008-02-27

申请人： Yong-Mi Lee ,  Jung-Sun Kang

发明人： Yong-Mi Lee ,  Jung-Sun Kang

IPC分类号： H04N7/12

CPC分类号： H04N19/423 ,  H04N19/61

摘要： A memory device for storing a plurality of macroblocks may include a plurality of memory banks. Each macroblock may include m*n pixel data, wherein m is a positive integer, and wherein n also is a positive integer. The plurality of memory banks is adapted to store the pixel data, and wherein each memory bank is sized to store rows of m pixel data. An image processing system may include: a memory adapted to store a plurality of macroblocks; and a video codec. The memory may include a plurality of memory banks. Each memory bank may be sized to store rows of m pixel data. The video codec may be adapted to encode pixel data read from the memory. The video codec also may be adapted to decode the pixel data read from the memory.

摘要翻译： 用于存储多个宏块的存储器件可以包括多个存储器组。 每个宏块可以包括m * n像素数据，其中m是正整数，并且其中n也是正整数。 多个存储体适于存储像素数据，并且其中每个存储体的大小设置为存储m个像素数据的行。 图像处理系统可以包括：适于存储多个宏块的存储器; 和视频编解码器。 存储器可以包括多个存储体。 每个存储体可以被设计成存储m个像素数据的行。 视频编解码器可以适于编码从存储器读取的像素数据。 视频编解码器也可以适于对从存储器读取的像素数据进行解码。

公开(公告)号：US20080205858A1

公开(公告)日：2008-08-28

申请号：US12071857

申请日：2008-02-27

申请人： Yong-Mi Lee ,  Jung-Sun Kang

发明人： Yong-Mi Lee ,  Jung-Sun Kang

IPC分类号： H04N5/917 ,  H04N7/26

CPC分类号： H04N19/423 ,  H04N19/61

摘要： A memory device for storing a plurality of macroblocks may include a plurality of memory banks. Each macroblock may include m*n pixel data, wherein m is a positive integer, and wherein n also is a positive integer. The plurality of memory banks is adapted to store the pixel data, and wherein each memory bank is sized to store rows of m pixel data. An image processing system may include: a memory adapted to store a plurality of macroblocks; and a video codec. The memory may include a plurality of memory banks. Each memory bank may be sized to store rows of m pixel data. The video codec may be adapted to encode pixel data read from the memory. The video codec also may be adapted to decode the pixel data read from the memory.

摘要翻译： 用于存储多个宏块的存储器件可以包括多个存储器组。 每个宏块可以包括m * n像素数据，其中m是正整数，并且其中n也是正整数。 多个存储体适于存储像素数据，并且其中每个存储体的大小设置成存储m个像素数据的行。 图像处理系统可以包括：适于存储多个宏块的存储器; 和视频编解码器。 存储器可以包括多个存储体。 每个存储体可以被设计成存储m个像素数据的行。 视频编解码器可以适于编码从存储器读取的像素数据。 视频编解码器也可以适于对从存储器读取的像素数据进行解码。

公开(公告)号：US07362808B2

公开(公告)日：2008-04-22

申请号：US10730237

申请日：2003-12-08

申请人： Jung-Sun Kang

发明人： Jung-Sun Kang

IPC分类号： H04N7/12

CPC分类号： H04N19/53

摘要： A motion estimator and an estimation method for a video encoder to reduce power consumption by reducing the computational complexity of the motion estimator. In an upper step, a full search for a ±4 pixel search region for a 4×4 pixel block is performed at ¼ video resolution, to detect two motion vector candidates. In a medium step, a partial search for two vector candidates selected in the upper step and one vector candidate using a spatial correlation is performed for a 8×8 block within a ±1 or ±2 search region, to decide one motion vector candidate. In a lower step, a partial search for the ±1 or ±2 search region on 16×16 block is performed at full resolution, and a half pixel search for a motion vector candidate obtained in the lower step is performed to estimate a final motion vector. A ±4 pixel search region is operatively divided into four search regions, and the estimator sequentially searches the four ±2 pixel search regions to sequentially output SAD values.

摘要翻译： 一种运动估计器和用于通过降低运动估计器的计算复杂度来降低功耗的视频编码器的估计方法。 在上一步中，以1/4视频分辨率执行4×4像素块的±4像素搜索区域的全面搜索，以检测两个运动矢量候选。 在中间步骤中，针对±1或±2个搜索区域内的8×8块执行在上级中选择的两个向量候选的部分搜索和使用空间相关的一个向量候选，以决定一个运动矢量候选。 在较低的步骤中，以全分辨率执行对16×16块上的±1或±2个搜索区域的部分搜索，并且执行在较低步骤中获得的运动矢量候选的半像素搜索以估计最终运动矢量。 将±4像素搜索区域可操作地划分为四个搜索区域，并且估计器依次搜索四个±2个像素搜索区域以顺序地输出SAD值。

公开(公告)号：US20060018384A1

公开(公告)日：2006-01-26

申请号：US11187908

申请日：2005-07-22

申请人： Kyung-Koo Lee ,  Jung-Sun Kang ,  Jin-Hyun Cho ,  Tae-Hwan Park

发明人： Kyung-Koo Lee ,  Jung-Sun Kang ,  Jin-Hyun Cho ,  Tae-Hwan Park

IPC分类号： H04N11/04 ,  H04N11/02 ,  H04N7/12 ,  H04B1/66

CPC分类号： H03M7/40 ,  H03M7/46 ,  H04N19/42 ,  H04N19/91 ,  H04N19/93

摘要： According to a coefficient variable length coding method adopting four-stage pipeline, a 3-dimension value including a run, a level and a last data is obtained by performing a run length coding upon coefficient data, where, after transferring the 3-dimension value, a variable bit vector is obtained from the transferred 3-dimension value and the variable length bit vector is stored, and where, particularly in case the pipeline breaks, the method reuses the previously obtained 3-dimension value to minimize process time such that the coefficient variable length coding is swiftly performed by the efficient pipeline operation, and the broken pipeline may be restored within minimized time.

摘要翻译： 根据采用四级流水线的系数可变长度编码方法，通过对系数数据执行游程长度编码，获得包括游程，水平和最后数据的3维值，其中，在传送3维值 ，从传送的3维值获得可变位向量，并存储可变长度位向量，并且其中，特别是在管道中断的情况下，该方法重新使用先前获得的3维值以最小化处理时间，使得 通过有效的流水线操作快速执行系数可变长度编码，并且可以在最短时间内恢复损坏的管道。

公开(公告)号：US20060115002A1

公开(公告)日：2006-06-01

申请号：US11226563

申请日：2005-09-14

申请人： Yun-Kyoung Kim ,  Jung-Sun Kang

发明人： Yun-Kyoung Kim ,  Jung-Sun Kang

IPC分类号： H04B1/66 ,  H04N11/04 ,  H04N7/12 ,  H04N11/02

CPC分类号： G06T5/20 ,  G06T5/002 ,  G06T2207/10016 ,  G06T2207/20021 ,  H04N19/42 ,  H04N19/86

摘要： An apparatus and method for pipelined deblocking includes a filter having a filtering engine, a plurality of registers in signal communication with the filtering engine, a pipeline control unit in signal communication with the filtering engine, and a finite state machine in signal communication with the pipeline control unit; and a method of filtering a block of pixel data processed with block transformations to reduce blocking artifacts includes filtering a first edge of the block, and filtering a third edge of the block no more than three edges after filtering the first edge, wherein the third edge is perpendicular to the first edge.

摘要翻译： 用于流水线去块的装置和方法包括具有过滤引擎的过滤器，与过滤引擎信号通信的多个寄存器，与过滤引擎信号通信的流水线控制单元以及与管线信号通信的有限状态机 控制单元 以及一种对块变换处理的像素数据块进行滤波以减少块伪影的方法，包括对该块的第一边进行滤波，以及在对该第一边进行滤波之后对该块的第三边缘进行滤波，该第三边不超过三个边，其中第三边 垂直于第一边缘。

公开(公告)号：US07590180B2

公开(公告)日：2009-09-15

申请号：US12049069

申请日：2008-03-14

申请人： Jung-Sun Kang

发明人： Jung-Sun Kang

IPC分类号： H04N7/12

CPC分类号： H04N19/53

摘要： A motion estimator and an estimation method for a video encoder to reduce power consumption by reducing the computational complexity of the motion estimator. In an upper step, a full search for a ±4 pixel search region for a 4×4 pixel block is performed at ¼ video resolution, to detect two motion vector candidates. In a medium step, a partial search for two vector candidates selected in the upper step and one vector candidate using a spatial correlation is performed for a 8×8 block within a ±1 or ±2 search region, to decide one motion vector candidate. In a lower step, a partial search for the ±1 or ±2 search region on 16×16 block is performed at full resolution, and a half pixel search for a motion vector candidate obtained in the lower step is performed to estimate a final motion vector. A ±4 pixel search region is operatively divided into four search regions, and the estimator sequentially searches the four ±2 pixel search regions to sequentially output SAD values.

摘要翻译： 一种运动估计器和用于通过降低运动估计器的计算复杂度来降低功耗的视频编码器的估计方法。 在上一步中，以1/4视频分辨率执行4×4像素块的±4像素搜索区域的全面搜索，以检测两个运动矢量候选。 在中间步骤中，针对±1或±2个搜索区域内的8×8块执行在上级中选择的两个向量候选的部分搜索和使用空间相关的一个向量候选，以决定一个运动矢量候选。 在较低的步骤中，以全分辨率执行对16×16块上的±1或±2个搜索区域的部分搜索，并且执行在较低步骤中获得的运动矢量候选的半像素搜索以估计最终运动矢量。 将±4像素搜索区域可操作地划分为四个搜索区域，并且估计器依次搜索四个±2个像素搜索区域以顺序地输出SAD值。

公开(公告)号：US20080205526A1

公开(公告)日：2008-08-28

申请号：US12049069

申请日：2008-03-14

申请人： Jung-Sun Kang

发明人： Jung-Sun Kang

IPC分类号： H04N7/26

CPC分类号： H04N19/53

摘要： A motion estimator and an estimation method for a video encoder to reduce power consumption by reducing the computational complexity of the motion estimator. In an upper step, a full search for a ±4 pixel search region for a 4×4 pixel block is performed at ¼ video resolution, to detect two motion vector candidates. In a medium step, a partial search for two vector candidates selected in the upper step and one vector candidate using a spatial correlation is performed for a 8×8 block within a ±1 or ±2 search region, to decide one motion vector candidate. In a lower step, a partial search for the ±1 or ±2 search region on 16×16 block is performed at full resolution, and a half pixel search for a motion vector candidate obtained in the lower step is performed to estimate a final motion vector. A ±4 pixel search region is operatively divided into four search regions, and the estimator sequentially searches the four ±2 pixel search regions to sequentially output SAD values.

摘要翻译： 一种运动估计器和用于通过降低运动估计器的计算复杂度来降低功耗的视频编码器的估计方法。 在上一步中，以1/4视频分辨率执行4×4像素块的±4像素搜索区域的全面搜索，以检测两个运动矢量候选。 在中间步骤中，针对±1或±2个搜索区域内的8×8块执行在上级中选择的两个向量候选的部分搜索和使用空间相关的一个向量候选，以决定一个运动矢量候选。 在较低的步骤中，以全分辨率执行对16×16块上的±1或±2个搜索区域的部分搜索，并且执行在较低步骤中获得的运动矢量候选的半像素搜索以估计最终运动矢量。 将±4像素搜索区域可操作地划分为四个搜索区域，并且估计器依次搜索四个±2个像素搜索区域以顺序地输出SAD值。

公开(公告)号：US07986734B2

公开(公告)日：2011-07-26

申请号：US11018762

申请日：2004-12-22

申请人： Jung-Sun Kang

发明人： Jung-Sun Kang

IPC分类号： H04N7/18

CPC分类号： H04N19/433 ,  H04N19/423 ,  H04N19/61

摘要： Exemplary embodiments of the present invention provide a data processing system which may include a task scheduler for enabling a plurality of independent data processing units to be operable in pipelining streams and/or controlling pipelined operations to be differentiated by tasks, and a memory pool for storing data from the data processing units. The data processing units may perform tasks in response to task start signals provided from the task scheduler. The data processing units may complete the tasks as instructed by the task scheduler, transmit task end signals to the scheduler and transition into standby states.

摘要翻译： 本发明的示例性实施例提供一种数据处理系统，其可以包括任务调度器，用于使多个独立的数据处理单元能够在流水线中流动管理和/或控制由任务区分的流水线操作，以及用于存储的存储器池 来自数据处理单元的数据。 数据处理单元可以响应于从任务调度器提供的任务开始信号执行任务。 数据处理单元可以按任务调度器的指示完成任务，将任务结束信号发送到调度器并转换到待机状态。