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公开(公告)号：US20090066679A1
公开(公告)日：2009-03-12
申请号：US12298553
申请日：2006-07-04
IPC分类号： G06F3/038
CPC分类号： G09G3/288 , G09G3/293 , G09G2300/0426 , G09G2330/021 , G09G2330/045
摘要： Provided is a technique relating to a scan driver of a PDP device which is capable of ensuring or improving performances of power consumption and temperature in an arrangement configuration of a substrate and a plurality of ICs, particularly, also in an area including an IC at a second position from the top. A scan driver (122) comprises, for example, two substrates (20) at the top and bottom that mount a plurality of ICs (30) having a plurality of outputs and are connected to terminals (40) of a Y electrode. Part of the plurality of ICs (30) on the substrate (20) has some outputs of the plurality of outputs are not connected to the terminals of the Y electrodes, and one (#2) of the ICs is arranged at a second position from the top in a device arrangement configuration.
摘要翻译： 提供了一种与PDP装置的扫描驱动器相关的技术，其能够确保或提高基板和多个IC的布置配置中的功耗和温度的性能，特别是在包括IC中的IC的区域中 从顶部排名第二。 扫描驱动器（122）包括例如在顶部和底部的两个基板（20），其安装具有多个输出的多个IC（30）并连接到Y电极的端子（40）。 基板（20）上的多个IC（30）的一部分具有多个输出的一些输出不连接到Y电极的端子，并且一个（＃2）IC被布置在从 在设备布置配置中的顶部。
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公开(公告)号：US07173581B2
公开(公告)日：2007-02-06
申请号：US10796107
申请日：2004-03-10
IPC分类号： G09G3/28
CPC分类号： G09G3/296 , G09G3/299 , G09G2320/0233 , G09G2330/025
摘要： An ALIS system PDP apparatus in which a reduction in the variation in luminance due to ringing has been reduced is disclosed. In an ALIS system PDP apparatus, X (first) electrodes and Y (second) electrodes are arranged in such a way that the X electrodes and the Y electrodes, whose path length, which is the length of each of the signal paths of a sustain discharge pulse from the X and Y electrode to sustain drive circuits, is longer or shorter than that of the peripheral X and Y electrodes, do not exist densely. Specifically, the order of arrangement of the odd and even X sustain drive circuits is reversed to that of odd and even Y sustain drive circuits.
摘要翻译： 公开了一种其中由于振铃引起的亮度变化的减小已经减少的ALIS系统PDP装置。 在ALIS系统PDP装置中，X（第一）电极和Y（第二）电极以这样的方式排列，使得X电极和Y电极的路径长度是维持每个信号路径的长度 来自X和Y电极的放电脉冲以维持驱动电路，比周边X和Y电极的放电脉冲长或短，不存在密集。 具体地说，奇数和偶数X维持驱动电路的排列顺序与奇数和偶数Y维持驱动电路相反。
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公开(公告)号：US20080238825A1
公开(公告)日：2008-10-02
申请号：US12129236
申请日：2008-05-29
CPC分类号： H01J40/14
摘要： An electrode drive circuit of a plasma display device includes a scan driver provided with plural drivers having first and second switching elements and first and second diodes, and a positive reset pulse generating circuit by which a first superposed voltage obtained by applying a predetermined first voltage to a low potential side terminal of the second switching element and superposing the first voltage and a voltage between a high potential side terminal of the first switching element and the low potential side terminal of the second switching element is generated to the high potential side terminal of the first switching element. The first superposed voltage is applied to the electrodes via the first switching element.
摘要翻译： 等离子体显示装置的电极驱动电路包括具有多个驱动器的扫描驱动器，该驱动器具有第一和第二开关元件以及第一和第二二极管，以及正复位脉冲发生电路，通过将正的复位脉冲发生电路施加到第 第二开关元件的低电位侧端子并且将第一开关元件的高电位侧端子与第二开关元件的低电位侧端子之间的第一电压和高电位侧端子之间的电压叠加在第二开关元件的高电位侧端子 第一开关元件。 第一重叠电压经由第一开关元件施加到电极。
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公开(公告)号：US20090237331A1
公开(公告)日：2009-09-24
申请号：US12328155
申请日：2008-12-04
IPC分类号： G09G3/28
摘要： A drive circuit for a plasma display device has a capacitance C1 connected between a high potential side terminal of a scan driver and a low potential side terminal thereof for applying a predetermined potential to a Y electrode. A with SWY5 clamps a second potential line LN2 connected to the low potential side terminal to a potential Vs. A switch SWY6 clamps the second potential line LN2 to a ground potential, and a switch SWY7 is provided that is capable of cutting off a connection between the second potential line LN2 and the ground potential via the switch SWY6. When the second potential line LN2 is a negative potential, it is possible to cut off the connection to the ground potential by turning the switch SWY7 off. This prevents a current from flowing via a parasitic diode of the switch SWY6.
摘要翻译： 用于等离子体显示装置的驱动电路具有连接在扫描驱动器的高电位侧端子和低电位侧端子之间的用于向Y电极施加预定电位的电容C1。 A与SWY5将连接到低电位侧端子的第二电位线LN2钳位到电位Vs。 开关SWY6将第二电位线LN2钳位到接地电位，并且提供能够通过开关SWY6切断第二电位线LN2与接地电位之间的连接的开关SWY7。 当第二电位线LN2为负电位时，可以通过关闭开关SWY7来切断与地电位的连接。 这防止了电流通过开关SWY6的寄生二极管流动。
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公开(公告)号：US07522129B2
公开(公告)日：2009-04-21
申请号：US11387907
申请日：2006-03-24
IPC分类号： G09G3/28
CPC分类号： H01J40/14
摘要： An electrode drive circuit of a plasma display device comprises: a scan driver provided with plural drivers including first and second switching elements and first and second diodes; a capacitor connected between the high potential side terminal and the low potential side terminal of the scan driver; a voltage supply circuit for selectively supplying plural voltages relating to the positive and negative voltages of the reset pulse and the voltage of a scan pulse to the low potential side terminal of the second switching element; and a negative reset switch and a resistor connected in series between the high potential side terminal of the first switching element and a ground terminal, wherein the reset pulse of negative polarity is applied by turning on the negative reset switch in a state where the capacitor is charged with the negative voltage of the reset pulse.
摘要翻译： 等离子体显示装置的电极驱动电路包括：具有多个驱动器的扫描驱动器，包括第一和第二开关元件以及第一和第二二极管; 连接在扫描驱动器的高电位侧端子和低电位侧端子之间的电容器; 电压供给电路，用于向第二开关元件的低电位侧端子选择性地提供与复位脉冲的正负电压和扫描脉冲的电压相关的多个电压; 以及串联连接在第一开关元件的高电位侧端子和接地端子之间的负复位开关和电阻器，其中通过在负极复位开关处接通负极性的复位脉冲，其中电容器为 充电复位脉冲的负电压。
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公开(公告)号：US20060214090A1
公开(公告)日：2006-09-28
申请号：US11387907
申请日：2006-03-24
IPC分类号： H01J40/14
CPC分类号： H01J40/14
摘要： An electrode drive circuit of a plasma display device comprises: a scan driver provided with plural drivers including first and second switching elements and first and second diodes; a capacitor connected between the high potential side terminal and the low potential side terminal of the scan driver; a voltage supply circuit for selectively supplying plural voltages relating to the positive and negative voltages of the reset pulse and the voltage of a scan pulse to the low potential side terminal of the second switching element; and a negative reset switch and a resistor connected in series between the high potential side terminal of the first switching element and a ground terminal, wherein the reset pulse of negative polarity is applied by turning on the negative reset switch in a state where the capacitor is charged with the negative voltage of the reset pulse.
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公开(公告)号：US6144349A
公开(公告)日：2000-11-07
申请号：US35923
申请日：1998-03-06
申请人： Yoshimasa Awata , Naoki Matsui , Kenji Awamoto , Yoshikazu Kanazawa , Shigetoshi Tomio , Fumitaka Asami , Masaya Tajima , Hideki Isohata , Junichi Okayasu , Kiyoshi Takata , Takashi Fujisaki
发明人： Yoshimasa Awata , Naoki Matsui , Kenji Awamoto , Yoshikazu Kanazawa , Shigetoshi Tomio , Fumitaka Asami , Masaya Tajima , Hideki Isohata , Junichi Okayasu , Kiyoshi Takata , Takashi Fujisaki
CPC分类号： G09G3/2965 , G09G3/297 , G09G2310/0218 , G09G2330/06
摘要： The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out. In addition, the currents flowing in opposing directions cancel each other out on the common ground wirings which are connected to the ground wirings of the drive circuits, and electromagnetic wave is reduced.
摘要翻译： 本发明涉及限制电磁波产生的等离子体显示装置。 等离子体显示装置具有用于向第一和第二显示电极对施加驱动电压的第一和第二驱动电路。 此外，当所述第一驱动电路施加所述驱动电压时，在所述第一显示电极对流动的充电电流的方向在所述等离子体显示面板上与所述第二显示电极对流动的充电电流的方向相反时， 所述第二驱动电路施加电压。 根据本发明，在对显示电极之一施加驱动电压时产生的过渡充放电电流和发光放电电流在面板上以相反的方向流动。 因此，由显示电极对的电感产生的电磁波彼此抵消。 此外，在相对方向流动的电流在连接到驱动电路的接地布线的公共接地布线上彼此抵消，电磁波减少。
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公开(公告)号：US08018168B2
公开(公告)日：2011-09-13
申请号：US11842734
申请日：2007-08-21
IPC分类号： G09G3/10
CPC分类号： G09G5/18 , G09G3/2022 , G09G3/28 , G09G3/2922 , G09G3/2925 , G09G3/2927 , G09G3/2932 , G09G3/296 , G09G2310/0224 , G09G2310/04 , G09G2310/066 , G09G2320/0238
摘要： Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period. The driving method in accordance with the present invention comprises a step of applying a first pulse in which an applied voltage varies with time so as to induce first discharge in the lines defined by the first and second electrodes, and a step of applying a second pulse in which an applied voltage varies with time so as to induce second discharge as erase discharge in the lines defined by the first and second electrodes. These steps are carried out during the reset period.
摘要翻译： 公开了一种用于驱动等离子体显示面板的方法，其中多个第一电极和第二电极彼此平行地布置，多个第三电极布置成与第一和第二电极交叉，并且排出单元被限定在其中 相互交叉的电极以矩阵的形式排列。 根据驱动方法，复位期间是多个放电单元中的壁电荷分布均匀的期间。 寻址周期是根据显示数据在放电单元中产生壁电荷的期间。 维持放电期间是在寻址期间产生壁电荷的放电单元中产生维持放电的期间。 根据本发明的驱动方法包括施加施加电压随时间变化的第一脉冲以在由第一和第二电极限定的线中引起第一次放电的步骤，以及施加第二脉冲的步骤 其中施加的电压随时间变化，以便在由第一和第二电极限定的线中的擦除放电时引起第二放电。 这些步骤在复位期间进行。
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公开(公告)号：US20080055199A1
公开(公告)日：2008-03-06
申请号：US11746671
申请日：2007-05-10
IPC分类号： G09G3/28
CPC分类号： G09G3/299 , G09G3/2942 , G09G3/2965 , G09G2320/0233 , G09G2330/021
摘要： In a sustain operation in an ALIS PDP device, a combination in which a basic first waveform and a second waveform in which a discharge peak is separated are mixed is applied. In the combination, the probability that the second waveform occurs successively is sufficiently reduced to less than 20%, and the number of times of sustain discharges of various intensities is made equal in the lines to be driven. By this means, the 2L nonuniformity can be prevented, and the deterioration of Vsmin can be reduced.
摘要翻译： 在ALIS PDP装置的维持操作中，应用混合了基本第一波形和放电峰值分离的第二波形的组合。 在组合中，连续出现第二波形的可能性被充分地降低到小于20％，并且使各种强度的维持放电的次数在待驱动的线路中相等。 通过这种方式，可以防止2L的不均匀性，并且可以降低Vsmin的劣化。
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公开(公告)号：US07224329B1
公开(公告)日：2007-05-29
申请号：US09702889
申请日：2000-11-01
申请人： Makoto Onozawa , Michitaka Ohsawa , Kenji Ishiwata , Takeshi Kuwahara , Yoshikazu Kanazawa , Kenji Kimura , Hidenori Ohnuki , Taizo Ohno
发明人： Makoto Onozawa , Michitaka Ohsawa , Kenji Ishiwata , Takeshi Kuwahara , Yoshikazu Kanazawa , Kenji Kimura , Hidenori Ohnuki , Taizo Ohno
IPC分类号： G09G3/10
CPC分类号： G09G3/296 , G09G3/294 , G09G3/2965 , G09G3/299 , G09G2330/021
摘要： A PDP apparatus of low power consumption and without erroneous malfunctions is equipped with a sustaining circuit that prevents an on/off timing shift and deterioration of a sustaining pulse produced thereby. Phase adjusting circuits, which adjust the timing of the changing edge of the sustaining pulse, are provided for the sustaining circuit; the power recovery circuit is of improved efficiency; and power consumption is reduced by optimizing the timing of a changing edge of the sustaining pulse The circuit devices used in the sustaining circuits are classified according to delay times and sets of the circuit devices are selected so that the timing of a changing edge of the sustaining pulse falls within a predetermined allowance, and the selected sets of the circuit devices are set to the PDP.
摘要翻译： 具有低功耗且没有错误故障的PDP装置配备有保持电路，其防止由此产生的持续脉冲的接通/关断定时偏移和劣化。 为维持电路提供调节维持脉冲的变化边沿的定时的相位调整电路; 电源恢复电路效率提高; 并且通过优化维持脉冲的变化边缘的定时来降低功耗。维持电路中使用的电路装置根据延迟时间进行分类，并且选择电路装置的组，使得维持脉冲的改变边沿的定时 脉冲落在预定容许范围内，并且所选择的电路装置组被设置为PDP。
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