公开(公告)号：US20110168997A1

公开(公告)日：2011-07-14

申请号：US13006591

申请日：2011-01-14

申请人： Young-Wook LEE ,  Woo-Geun LEE ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Ji-Soo OH

发明人： Young-Wook LEE ,  Woo-Geun LEE ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/124 ,  H01L21/76834 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/7869 ,  H01L29/78693

摘要： A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.

摘要翻译： 提供薄膜晶体管（TFT）阵列基板及其制造方法。 TFT阵列基板可以包括设置在基板上的栅极线，包括栅极线和栅电极，设置在栅电极上的氧化物半导体层图案，设置在氧化物半导体层图案上的数据线，并且包括源电极和 薄膜晶体管（TFT）的漏电极和栅电极以及沿着与栅极线交叉的方向延伸的数据线，以及蚀刻停止图案，设置在源极/漏极之间形成TFT的区域，以及 氧化物半导体层图案和栅极线与数据线在栅极线与数据线之间重叠的区域。

公开(公告)号：US20120217493A1

公开(公告)日：2012-08-30

申请号：US13365704

申请日：2012-02-03

申请人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

发明人： Jin-Won LEE ,  Woo Geun LEE ,  Kap Soo YOON ,  Ki-Won KIM ,  Hyun-Jung LEE ,  Hee-Jun BYEON ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L33/02 ,  H01L29/24

CPC分类号： H01L27/1225 ,  H01L29/41733

摘要： A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.

摘要翻译： 薄膜晶体管阵列面板包括：设置在绝缘基板上的栅电极; 设置在栅电极上的栅极绝缘层; 直接设置在栅极绝缘层上的第一电极和氧化物半导体; 形成在所述氧化物半导体上的源电极和漏电极; 设置在所述第一电极，所述源电极和所述漏电极上的钝化层; 以及设置在钝化层上的第二电极。

公开(公告)号：US20130099240A1

公开(公告)日：2013-04-25

申请号：US13650528

申请日：2012-10-12

申请人： Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

发明人： Hyun-Jung LEE ,  Sung-Haeng CHO ,  Woo-Geun LEE ,  Jang-Hoon HA ,  Hee-Jun BYEON ,  Ji-Yun HONG ,  Ji-Soo OH

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/78693 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/78606 ,  H01L29/7869

摘要： A Thin Film Transistor (TFT) includes a substrate, a semiconductor layer disposed on the substrate a first source electrode and a first drain electrode spaced apart from each other on the semiconductor layer, a channel area disposed in the semiconductor layer between the first source electrode and the first drain electrode, an etching prevention layer disposed on the channel area, the first source electrode, and the first drain electrode and a second source electrode in contact with the first source electrode, and a second drain electrode in contact with the first drain electrode.