公开(公告)号：US06808589B2

公开(公告)日：2004-10-26

申请号：US10171724

申请日：2002-06-14

申请人： Yu-Sheng Su ,  Chiang-Jen Peng ,  Pin-Chia Su ,  Wen-Lang Wu

发明人： Yu-Sheng Su ,  Chiang-Jen Peng ,  Pin-Chia Su ,  Wen-Lang Wu

IPC分类号： B68G6800

CPC分类号： H01L21/67259 ,  H01L21/67253 ,  H01L21/67781

摘要： A wafer transfer robot for a wafer processing system, such as a wet bench system, and a method for utilizing the robot. The wafer transfer robot can be constructed by a robot arm that is equipped with a plurality of wafer blades each adapted for picking-up and carrying one of a plurality of wafers. The plurality of wafer blades each has a predetermined thickness, a top surface, a bottom surface and a predetermined spacing from adjacent wafer blades. A plurality of sensors, such as optical sensors, capacitance sensors or magnetic sensors, with at least one mounted on the bottom side of one of the plurality of wafer blades for sensing the presence of metal on a wafer carried on an adjacent wafer blade immediately below the one of the plurality of wafer blades.

摘要翻译： 用于晶片处理系统的晶片传送机器人，例如湿台架系统，以及利用该机器人的方法。 晶片传送机器人可以由装备有多个晶片叶片的机器人手臂构成，每个晶片叶片适于拾取和携带多个晶片中的一个。 多个晶片叶片各自具有预定的厚度，顶表面，底表面和与相邻晶片刀片的预定间隔。 多个传感器，例如光学传感器，电容传感器或磁性传感器，其中至少一个传感器安装在多个晶片刀片之一的底侧上，用于感测在紧邻下方的相邻晶片刀片上承载在晶片上的金属的存在 多个晶片刀片中的一个。

公开(公告)号：US20110062375A1

公开(公告)日：2011-03-17

申请号：US12952540

申请日：2010-11-23

申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC分类号： C09K13/08

CPC分类号： H01L21/02032 ,  H01L21/31111

摘要： An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

摘要翻译： 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

公开(公告)号：US20090111269A1

公开(公告)日：2009-04-30

申请号：US11931796

申请日：2007-10-31

申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC分类号： H01L21/311 ,  C09K13/08

CPC分类号： H01L21/02032 ,  H01L21/31111

摘要： By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

摘要翻译： 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

公开(公告)号：US07851374B2

公开(公告)日：2010-12-14

申请号：US11931796

申请日：2007-10-31

申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/02032 ,  H01L21/31111

摘要： By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

摘要翻译： 通过在包含扩张添加剂和钝化添加剂的基于HF的低k电介质蚀刻溶剂中暴露其上具有多孔低k电介质层的工艺控制晶片，低k电介质层中的孔被扩大其中一些 彼此连接以形成延伸穿过介电层厚度的一个或多个连续通道，并允许基于HF的溶剂到达基底。 然后，基于HF的蚀刻溶剂的钝化添加剂组分在介电层和衬底界面处形成钝化层，保护衬底免受基于HF的蚀刻剂的影响。

公开(公告)号：US08696930B2

公开(公告)日：2014-04-15

申请号：US12952540

申请日：2010-11-23

申请人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

发明人： Tai-Yung Yu ,  Yu-Sheng Su ,  Li-Te Hsu ,  Jin-Lin Liang ,  Pin-Chia Su

IPC分类号： C09K13/08

CPC分类号： H01L21/02032 ,  H01L21/31111

摘要： An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

摘要翻译： 用于去除半导体衬底上的多孔低k电介质层的蚀刻剂包括氢氟酸溶剂，用于膨胀多孔低k电介质中的孔的扩张添加剂和在界面处形成钝化层的钝化添加剂 在低k电介质层和半导体衬底之间。

公开(公告)号：US20090233447A1

公开(公告)日：2009-09-17

申请号：US12046096

申请日：2008-03-11

申请人： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

发明人： Jin-Lin Liang ,  Yu-Sheng Su ,  Tai-Yung Yu ,  Perre Kao ,  Pin-Chia Su ,  Li Te Hsu

IPC分类号： H01L21/461

CPC分类号： H01L21/02032 ,  H01L21/02079 ,  H01L21/31111 ,  H01L21/31116

摘要： A method of recycling a control wafer having a dielectric layer deposited thereon involves removing most of the dielectric layer by plasma etching leaving a residual film of the dielectric and then removing the residual dielectric film by a wet etching process. The combination of the dry and wet etching provides effective removal of the dielectric material without damaging the wafer substrate and any residual wet etching byproduct particulate remaining on the wafer substrate is then removed by APM cleaning and scrubbing.

摘要翻译： 回收具有沉积在其上的电介质层的控制晶片的方法包括通过等离子体蚀刻去除大部分介电层，留下电介质的残留膜，然后通过湿蚀刻工艺去除残留的电介质膜。 干蚀刻和湿蚀刻的组合提供有效去除电介质材料而不损坏晶片衬底，然后通过APM清洁和擦洗除去留在晶片衬底上的任何残留的湿蚀刻副产物颗粒。

公开(公告)号：US20110310525A1

公开(公告)日：2011-12-22

申请号：US13189984

申请日：2011-07-25

申请人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

发明人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

IPC分类号： H02N13/00

CPC分类号： H01L21/6833

摘要： A system for chucking and de-chucking a work piece comprises a wafer stage having a chuck support for supporting a chuck. The wafer stage further comprises a chuck mounted on the chuck support for receiving and attaching the work piece thereto; a support lift means for supporting the work piece; a driving means coupled to the support lift means for gradually raising the support lift means to contact the work piece in response to a variable quantity; a controller for receiving the variable quantity; and a regulating means coupled to the driving means and to the controller, the regulating means for controlling the variable quantity going to the driving means when a predetermined variable quantity is detected.

摘要翻译： 用于夹紧和去夹紧工件的系统包括具有用于支撑卡盘的卡盘支撑件的晶片台。 晶片台还包括安装在卡盘支架上的卡盘，用于接收和附接工件; 用于支撑工件的支撑提升装置; 驱动装置，联接到所述支撑提升装置，用于逐渐升高所述支撑提升装置，以响应于可变量接触所述工件; 用于接收可变量的控制器; 以及调节装置，其耦合到所述驱动装置和所述控制器，所述调节装置用于当检测到预定可变量时控制进入所述驱动装置的可变量。

公开(公告)号：US08000081B2

公开(公告)日：2011-08-16

申请号：US12172642

申请日：2008-07-14

申请人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

发明人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

IPC分类号： H01L21/683 ,  H01T23/00

CPC分类号： H01L21/6833

摘要： A wafer stage installed in a process chamber for safely dechucking a wafer is provided. In one embodiment, the wafer stage comprises: a chuck support for supporting a chuck; a chuck mounted on the chuck support for receiving and attaching a wafer thereto; a support lift means for supporting the wafer; a driving means coupled to the support lift means for gradually raising the support lift means to contact the wafer in response to a variable quantity; a sensor attached to the driving means for detecting a change in the variable quantity; and a controller for controlling the variable quantity to the driving means when a predetermined variable quantity is detected in comparison to the change in the variable quantity for a predetermined time.

摘要翻译： 提供了安装在用于安全地脱扣晶片的处理室中的晶片台。 在一个实施例中，晶片台包括：用于支撑卡盘的卡盘支撑件; 安装在卡盘支架上的用于接收和附接晶片的卡盘; 用于支撑晶片的支撑提升装置; 连接到所述支撑提升装置的驱动装置，用于逐渐升高所述支撑提升装置以响应于可变量与所述晶片接触; 附接到驱动装置的传感器，用于检测可变量的变化; 以及控制器，用于当与预定时间内的可变量的变化相比较检测到预定可变量时，控制对驱动装置的可变量。

公开(公告)号：US08416555B2

公开(公告)日：2013-04-09

申请号：US13189984

申请日：2011-07-25

申请人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

发明人： Chung-Tsung Lu ,  Pin-Chia Su ,  Yu-Chih Liou

IPC分类号： H01L21/683 ,  H01T23/00

CPC分类号： H01L21/6833

摘要： A system for chucking and de-chucking a work piece comprises a wafer stage having a chuck support for supporting a chuck. The wafer stage further comprises a chuck mounted on the chuck support for receiving and attaching the work piece thereto; a support lift means for supporting the work piece; a driving means coupled to the support lift means for gradually raising the support lift means to contact the work piece in response to a variable quantity; a controller for receiving the variable quantity; and a regulating means coupled to the driving means and to the controller, the regulating means for controlling the variable quantity going to the driving means when a predetermined variable quantity is detected.

摘要翻译： 用于夹紧和去夹紧工件的系统包括具有用于支撑卡盘的卡盘支撑件的晶片台。 晶片台还包括安装在卡盘支架上的卡盘，用于接收和附接工件; 用于支撑工件的支撑提升装置; 驱动装置，联接到所述支撑提升装置，用于逐渐升高所述支撑提升装置，以响应于可变量接触所述工件; 用于接收可变量的控制器; 以及调节装置，其耦合到所述驱动装置和所述控制器，所述调节装置用于当检测到预定可变量时控制进入所述驱动装置的可变量。

公开(公告)号：US20050191802A1

公开(公告)日：2005-09-01

申请号：US10788170

申请日：2004-02-26

申请人： Yu-Lung Yeh ,  Chu-We Hu ,  Li-Te Hsu ,  Pin-Chia Su

发明人： Yu-Lung Yeh ,  Chu-We Hu ,  Li-Te Hsu ,  Pin-Chia Su

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/02

CPC分类号： H01L21/823814 ,  H01L27/0266

摘要： The fabrication an NMOS device featuring a shallow source/drain region, performed as part of an integrated process sequence employed to integrate the fabrication of other type devices with the fabrication of the NMOS device, has been developed. A critical feature of the integrated process sequence is the formation of the shallow source/drain region of the NMOS accomplished after formation of the other type devices, thus reducing the risk of exposure of the shallow source/drain region to possible damaging procedures used for the other type devices. In addition the process used to remove a photoresist shape, used to protect the completed other type devices from the shallow source/drain ion implantation procedure, has been modified again to reduce possible damage to the shallow source/drain region. The flow of CF4 in the plasma tool during the photoresist removing plasma ashing procedure, as well as the length of the post-plasma ashing wet clean procedure, have both been reduced resulting in reduced exposure of the shallow source/drain region to these procedures.

摘要翻译： 已经开发了制造具有浅源极/漏极区域的NMOS器件，其作为用于将其他类型器件的制造与NMOS器件的制造集成的集成工艺序列的一部分进行。 集成过程序列的关键特征是在形成其它类型器件之后形成NMOS的浅源/漏区，从而降低了浅源/漏区暴露于用于 其他类型的设备。 此外，用于去除用于保护完成的其它类型器件免于浅源/漏离子注入过程的光致抗蚀剂形状的方法已被再次修改，以减少对浅源/漏区的可能损坏。 在光致抗蚀剂去除等离子体灰化过程期间等离子体工具中的CF 4的流动以及后等离子体灰化湿法清洁程序的长度都被减少，导致浅的 源/漏区到这些程序。