公开(公告)号：US20070024776A1

公开(公告)日：2007-02-01

申请号：US11312933

申请日：2005-12-21

申请人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu ,  Wei-Yi Chien

发明人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu ,  Wei-Yi Chien

IPC分类号： G02F1/1335

CPC分类号： G02B5/3058 ,  G02F1/133528 ,  G02F2001/133548

摘要： An integrated type optical film with a wire grid polarizer structure and a manufacturing method thereof solves the optical matching problem of conventional optical film and integrates an optical effectiveness with all layers by using non-linear optical theory to redistribute integral polarizing efficiency and transmittance in all layers. The integrated type optical film includes two types of polarizers, a reflective type wire grid polarizer and an absorbing type polarizer. The reflective type wire grid polarizer can reflect an incident polarizing light parallel with a metal grid thereof, and transform and transmit polarizing light perpendicular to the polarizer with secondary transmitting efficiency, so that multi-layered structures are integrated into a polarizer with high polarizing efficiency, high transmittance and light-reflective efficiency.

摘要翻译： 具有线栅偏振器结构的集成型光学膜及其制造方法解决了传统光学膜的光学匹配问题，并且通过使用非线性光学理论将所有层的光学效能与所有层集成，以重新分布整体偏振效率和所有层中的透射率 。 集成型光学膜包括两种类型的偏振器，反射型线栅偏振器和吸收型偏振器。 反射型线栅偏振器可以反射与其金属栅格平行的入射偏振光，并且以二次透射效率将与偏振器垂直的偏振光变换并透射，从而将多层结构集成到具有高偏振效率的偏振片中， 透光率高，反光效率高。

公开(公告)号：US20060176422A1

公开(公告)日：2006-08-10

申请号：US11159316

申请日：2005-06-23

申请人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu ,  Wei-Yi Chien

发明人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu ,  Wei-Yi Chien

IPC分类号： G02F1/1335

CPC分类号： G02B5/305

摘要： A brightness-enhancing integral polarizer and optical film structure and manufacture are described. The brightness-enhancing integral polarizer and optical film have an absorptive polarizer and a reflective polarizer. The reflective polarizer generates a reflective light source effect, and uses a nonlinear optic design to coat a brightness-enhancing integral polarizer and optical film with a different dye on at least one substrate and produce the effects of brightness enhancement, high polarization, high transmittance, wide viewing angle and high contrast for the brightness-enhancing integral polarizer and optical film structure and manufacturing method.

摘要翻译： 描述了亮度增强整体偏振器和光学膜结构和制造。 增亮型积分偏振片和光学膜具有吸收型偏振片和反射型偏振片。 反射型偏振片产生反射光源效应，并使用非线性光学设计，在至少一个基板上涂上不同染料的亮度增强整体偏光镜和光学膜，产生亮度增强，高极化，高透光率， 宽视角和高对比度的亮度增强整体偏光镜和光学膜结构及制造方法。

公开(公告)号：US07626657B2

公开(公告)日：2009-12-01

申请号：US11131247

申请日：2005-05-18

申请人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu

发明人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu

IPC分类号： G02F1/1335

CPC分类号： G02B5/305 ,  G02F2001/133565

摘要： A multi-function integrated polarizer/optical film structure and manufacturing method thereof solves the disadvantages of O type or E type polarizers that cannot simultaneously have high polarizing efficiency and high transmittance. The present invention utilizes optical design for a polarizer/optical film having a plurality of material layers on substrates. The present invention is a multi-function integrated polarizer/optical film structure and manufacturing method thereof, that allows an LCD image to have high polarizing efficiency, high transmittance, wide-angle, high contrast and super-film characteristics simultaneously.

摘要翻译： 多功能集成偏振片/光学膜结构及其制造方法解决了不能同时具有高偏振效率和高透射率的O型或E型偏振器的缺点。 本发明利用光学设计用于在衬底上具有多个材料层的偏振器/光学膜。 本发明是一种多功能集成偏振片/光学膜结构及其制造方法，其可以使LCD图像同时具有高的偏振效率，高透射率，广角度，高对比度和超薄膜特性。

公开(公告)号：US20060103781A1

公开(公告)日：2006-05-18

申请号：US11131247

申请日：2005-05-18

申请人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu

发明人： Yue-Shih Jeng ,  Yuh-Shyang Chen ,  Wei-Chih Liu ,  Tsung-Hsiung Wang ,  Yu-Hsun Wu

IPC分类号： G02F1/1335

CPC分类号： G02B5/305 ,  G02F2001/133565

摘要： A multi-function integrated polarizer/optical film structure and manufacturing method thereof solves the disadvantages of O type or E type polarizers that cannot simultaneously have high polarizing efficiency and high transmittance. The present invention utilizes optical design to a polarizer/optical film having a plurality of material layers on substrates. The present invention is a multi-function integrated polarizer/optical film structure and manufacturing method thereof, that allows an LCD image to have high polarizing efficiency, high transmittance, wide-angle, high contrast and super-film characteristics simultaneously.

摘要翻译： 多功能集成偏振片/光学膜结构及其制造方法解决了不能同时具有高偏振效率和高透射率的O型或E型偏振器的缺点。 本发明将光学设计应用于在基板上具有多个材料层的偏振器/光学膜。 本发明是一种多功能集成偏振片/光学膜结构及其制造方法，其可以使LCD图像同时具有高的偏振效率，高透射率，广角度，高对比度和超薄膜特性。

公开(公告)号：US09116579B2

公开(公告)日：2015-08-25

申请号：US13756535

申请日：2013-02-01

申请人： Yue-Shih Jeng ,  Wei-Chih Liu ,  Tien-Rong Lu

发明人： Yue-Shih Jeng ,  Wei-Chih Liu ,  Tien-Rong Lu

IPC分类号： G06F3/043

CPC分类号： G06F3/043 ,  G06F3/0436

摘要： A multi input and multi output (MIMO) sonic touch panel includes at least a sonic touch module and a display module. The sonic touch module includes a first carrier layer, a first vibrating layer and a first conducting layer. The first vibrating layer is disposed at the first carrier layer. The first conducting layer is disposed at the first carrier layer or the first vibrating layer and coupled with the first vibrating layer. The first conducting layer and the first vibrating layer are located at the same side or the opposite side of the first carrier layer. The display module is disposed opposite to the sound touch module. Besides, a MIMO smart sound potential server is also disclosed.

摘要翻译： 多输入多输出（MIMO）声波触摸面板至少包括声音触摸模块和显示模块。 声波触摸模块包括第一载体层，第一振动层和第一导电层。 第一振动层设置在第一载体层。 第一导电层设置在第一载体层或第一振动层上并与第一振动层耦合。 第一导电层和第一振动层位于第一载体层的相同侧或相对侧。 显示模块设置成与声音触摸模块相对。 此外，还公开了MIMO智能声音服务器。

公开(公告)号：US20110043736A1

公开(公告)日：2011-02-24

申请号：US12582717

申请日：2009-10-21

申请人： Wei-Chih Liu

发明人： Wei-Chih Liu

IPC分类号： G02F1/13363 ,  G02B5/30 ,  G02B1/08

CPC分类号： G02B5/3083 ,  B82Y20/00 ,  G02B2207/101 ,  G02F1/13363

摘要： A liquid crystal display including a liquid crystal panel and a biaxial compensation film is provided. The liquid crystal panel has a first surface and a second surface. The biaxial compensation film is disposed on the first surface and includes a C-plate compensation film and nano-structures on the C-plate compensation film serving as an A-plate compensation film.

摘要翻译： 提供包括液晶面板和双轴补偿膜的液晶显示器。 液晶面板具有第一表面和第二表面。 双轴补偿膜设置在第一表面上，并且在用作A板补偿膜的C板补偿膜上包括C板补偿膜和纳米结构。

公开(公告)号：US20130193511A1

公开(公告)日：2013-08-01

申请号：US13358823

申请日：2012-01-26

申请人： Hsuan-Yu FANG ,  Wei-Chih Liu ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang ,  Kazuaki Takesako ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Hirotake Fujita ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Yoshinori Tanaka

发明人： Hsuan-Yu FANG ,  Wei-Chih Liu ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang ,  Kazuaki Takesako ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Hirotake Fujita ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Yoshinori Tanaka

IPC分类号： H01L27/088

CPC分类号： H01L29/7827 ,  H01L29/4236 ,  H01L29/66666

摘要： A vertical transistor structure comprises a substrate, a plurality of pillars formed on the substrate and spaced from each other, a plurality of trenches each formed between two adjacent pillars, a protection layer formed on the surface of a first side wall and the surface of a second side wall of the trench, a first gate and a second gate respectively formed on the protection layer of the first side wall and the second side wall, and a separation layer covering a bottom wall of the trench. The present invention uses the separation layer functioning as an etch stopping layer to the first gate and the second gate while being etched. Further, thickness of the separation layer is used to control the distance between the bottom wall and the first and second gates and define widths of the drain and the source formed in the pillar via ion implantation.

摘要翻译： 垂直晶体管结构包括基板，形成在基板上并彼此间隔开的多个柱，每个形成在两个相邻柱之间的多个沟槽，形成在第一侧壁的表面上的保护层和 沟槽的第二侧壁，分别形成在第一侧壁和第二侧壁的保护层上的第一栅极和第二栅极以及覆盖沟槽底壁的分离层。 本发明在蚀刻时使用用作蚀刻停止层的分离层到第一栅极和第二栅极。 此外，分离层的厚度用于控制底壁和第一和第二栅极之间的距离，并且通过离子注入限定在柱中形成的漏极和源极的宽度。

公开(公告)号：US20130234230A1

公开(公告)日：2013-09-12

申请号：US13415959

申请日：2012-03-09

申请人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

发明人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

IPC分类号： H01L27/105 ,  H01L21/225

CPC分类号： H01L21/2257 ,  H01L21/2236 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/41741 ,  H01L29/66666 ,  H01L29/7827

摘要： A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.

摘要翻译： 半导体器件包括：具有基底和从基底延伸的半导体柱阵列的衬底，衬底形成有多个沟槽，每个沟槽延伸到衬底中并且具有两个相对的沟槽侧壁; 第一绝缘衬垫层，其形成在每个沟槽的每个沟槽侧壁上，并且通过间隙留下每个沟槽侧壁的位形成表面，该间隙未被第一绝缘衬垫层覆盖; 以及多个掩埋位线，每个埋入位线从每个沟槽的相应一个沟槽侧壁的位形成表面延伸到基座中。

公开(公告)号：US20130157454A1

公开(公告)日：2013-06-20

申请号：US13327157

申请日：2011-12-15

申请人： Wei-Che CHANG ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

发明人： Wei-Che CHANG ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

IPC分类号： H01L21/28

CPC分类号： H01L29/66666 ,  H01L27/10876

摘要： A self-aligned wet etching process comprises the steps of: etching a substrate having an etch protection layer on a surface thereof to form a plurality of trenches spaced from each other; and sequentially forming an insulating layer, an etch stop layer and a primary insulator in each trench, wherein the primary insulator is filled inside an accommodation space surrounded by the etch stop layer. During the wet etching process, the etch stop layer protects the primary insulator from being etched, whereby is achieved anisotropic wet etching. Further, the present invention expands the contact areas for electrically connecting with external circuits and exempts the electric contactors formed on the contact areas from short circuit caused by excessively etching the primary insulators.

摘要翻译： 自对准湿蚀刻工艺包括以下步骤：在其表面上蚀刻具有蚀刻保护层的衬底，以形成彼此间隔开的多个沟槽; 并且在每个沟槽中依次形成绝缘层，蚀刻停止层和初级绝缘体，其中所述初级绝缘体填充在由所述蚀刻停止层包围的容纳空间的内部。 在湿蚀刻工艺期间，蚀刻停止层保护初级绝缘体不被蚀刻，从而实现各向异性湿蚀刻。 此外，本发明扩大了与外部电路电连接的接触面积，并且免除了形成在接触区域上的电接触器由于过度蚀刻初级绝缘体而引起的短路。

公开(公告)号：US08461056B1

公开(公告)日：2013-06-11

申请号：US13327157

申请日：2011-12-15

申请人： Wei-Che Chang ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

发明人： Wei-Che Chang ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

IPC分类号： H01L21/302

CPC分类号： H01L29/66666 ,  H01L27/10876

摘要： A self-aligned wet etching process comprises the steps of: etching a substrate having an etch protection layer on a surface thereof to form a plurality of trenches spaced from each other; and sequentially forming an insulating layer, an etch stop layer and a primary insulator in each trench, wherein the primary insulator is filled inside an accommodation space surrounded by the etch stop layer. During the wet etching process, the etch stop layer protects the primary insulator from being etched, whereby is achieved anisotropic wet etching. Further, the present invention expands the contact areas for electrically connecting with external circuits and exempts the electric contactors formed on the contact areas from short circuit caused by excessively etching the primary insulators.

摘要翻译： 自对准湿蚀刻工艺包括以下步骤：在其表面上蚀刻具有蚀刻保护层的衬底，以形成彼此间隔开的多个沟槽; 并且在每个沟槽中依次形成绝缘层，蚀刻停止层和初级绝缘体，其中所述初级绝缘体填充在由所述蚀刻停止层包围的容纳空间的内部。 在湿蚀刻工艺期间，蚀刻停止层保护初级绝缘体不被蚀刻，从而实现各向异性湿蚀刻。 此外，本发明扩大了与外部电路电连接的接触面积，并且免除了形成在接触区域上的电接触器由于过度蚀刻初级绝缘体而引起的短路。