公开(公告)号：US20100093142A1

公开(公告)日：2010-04-15

申请号：US12248049

申请日：2008-10-09

申请人： Ching-Yuan Ho ,  Hirotake Fujita ,  Po-Jui Chiang

发明人： Ching-Yuan Ho ,  Hirotake Fujita ,  Po-Jui Chiang

IPC分类号： H01L21/336 ,  H01L21/314

CPC分类号： H01L27/11521

摘要： A method of fabricating a device is described. A substrate having at least two isolation structures is provided. A first oxide layer and a first conductive layer are sequentially formed on the substrate between the isolation structures. A first nitridation process is performed to form a first nitride layer on the surface of the first conductive layer and a first oxynitride layer on the surface of the isolation structures. A second oxide layer is formed on the first nitride layer and first oxynitride layer. A densification process is performed to oxidize the first oxynitride layer on the surface of the isolation structures. A second nitride layer and a third oxide layer are sequentially formed on the second oxide layer. A second nitridation process is performed to form a third nitride layer on the surface of the third oxide layer. A second conductive layer is formed on the third nitride layer.

摘要翻译： 描述了一种制造装置的方法。 提供具有至少两个隔离结构的衬底。 在隔离结构之间的衬底上依次形成第一氧化物层和第一导电层。 进行第一氮化处理以在第一导电层的表面上形成第一氮化物层，在隔离结构的表面上形成第一氮氧化物层。 在第一氮化物层和第一氮氧化物层上形成第二氧化物层。 进行致密化处理以氧化隔离结构的表面上的第一氧氮化物层。 在第二氧化物层上依次形成第二氮化物层和第三氧化物层。 进行第二次氮化处理以在第三氧化物层的表面上形成第三氮化物层。 在第三氮化物层上形成第二导电层。

公开(公告)号：US20080057190A1

公开(公告)日：2008-03-06

申请号：US11925516

申请日：2007-10-26

申请人： Mitsuru Kobayashi ,  Ikuko Furukawa ,  Hirotake Fujita ,  Tetsuo Tsuchida

发明人： Mitsuru Kobayashi ,  Ikuko Furukawa ,  Hirotake Fujita ,  Tetsuo Tsuchida

IPC分类号： B05D1/36

CPC分类号： B41M5/502 ,  B41M5/506 ,  B41M5/5218 ,  B41M5/5236 ,  B41M5/5254

摘要： Ink jet recording sheet having excellent glossiness, ink absorptivity, image quality, and long-term preservability in which cracks generated on an ink receiving layer are significantly reduced. The ink jet recording sheet includes a supporting medium; and an ink receiving layer including an inorganic fine particle, a cationic polymer, and a binder, wherein an average primary particle size of the inorganic fine particle is 30 nm or less, and the cationic polymer including: at least one structural unit (a1) expressed by a following general formula (1) or (2): wherein m and n independently represents an integer of 0 to 4, and X represents an acid residue; and at least one structural unit (a2) expressed by a following general formula (3), (4), (5) or (6): wherein R1 to R8 independently represents a hydrogen atom or a C1-C4 alkyl group, and Y and Z independently represents an acid residue.

摘要翻译： 具有优异的光泽度，油墨吸收性，图像质量以及在油墨接收层上产生的裂纹显着降低的长期保存性的喷墨记录纸。 喷墨记录纸包括支撑介质; 以及包含无机细颗粒，阳离子聚合物和粘合剂的油墨接收层，其中所述无机微粒的平均一次粒径为30nm以下，所述阳离子性高分子包含：至少一个结构单元（a1） 由以下通式（1）或（2）表示：其中m和n独立地表示0至4的整数，X表示酸残基; 和由以下通式（3），（4），（5）或（6）表示的至少一个结构单元（a2）：其中R 1至R 8 >独立地表示氢原子或C1-C4烷基，Y和Z独立地表示酸残基。

公开(公告)号：US07229917B2

公开(公告)日：2007-06-12

申请号：US10957827

申请日：2004-10-05

申请人： Takahito Umehara ,  Masahiko Tomita ,  Hirotake Fujita ,  Kazuhide Hasebe

发明人： Takahito Umehara ,  Masahiko Tomita ,  Hirotake Fujita ,  Kazuhide Hasebe

IPC分类号： H01L21/4763

CPC分类号： H01L21/76876 ,  C23C16/18 ,  C23C16/40 ,  C23C16/45525 ,  C23C16/45546 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L28/65

摘要： A film-formation method for a semiconductor process includes seed film formation and main film formation. In the seed film formation, a metal-containing raw material gas and a first assist gas to react therewith are supplied into a process container, which accommodates a target substrate having an underlying layer, thereby forming a seed film on the underlying layer by CVD. In the main film formation, the raw material gas and a second assist gas to react therewith are supplied into the process container, thereby forming a main film on the seed film by CVD. The seed film formation includes first and second periods performed alternately and continuously. In each first period, the raw material gas is supplied into the process container while the first assist gas is stopped. In each second period, the first assist gas is supplied into the process container while the raw material gas is stopped.

摘要翻译： 半导体工艺的成膜方法包括种子膜形成和主要成膜。 在种子膜形成中，将含金属的原料气体和与其反应的第一辅助气体供给到容纳具有下层的目标基板的处理容器中，由此通过CVD在下层上形成种子膜。 在主成膜中，将原料气体和与其反应的第二辅助气体供给到处理容器中，由此通过CVD在种子膜上形成主膜。 种子膜形成包括交替且连续地执行的第一和第二周期。 在第一期间，在第一辅助气体停止的同时将原料气体供给到处理容器。 在第二期间，在停止原料气体的同时，将第一辅助气体供给到处理容器。

公开(公告)号：US07041546B2

公开(公告)日：2006-05-09

申请号：US10639773

申请日：2003-08-13

申请人： Yuichiro Morozumi ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Haruhiko Furuya ,  Dong-Kyun Choi ,  Takahito Umehara ,  Katsushige Harada ,  Tomonori Fujiwara ,  Hirotake Fujita

发明人： Yuichiro Morozumi ,  Kazuhide Hasebe ,  Shigeru Nakajima ,  Haruhiko Furuya ,  Dong-Kyun Choi ,  Takahito Umehara ,  Katsushige Harada ,  Tomonori Fujiwara ,  Hirotake Fujita

IPC分类号： H01L21/8238

CPC分类号： H01L28/56 ,  H01L21/31612 ,  H01L21/31637 ,  H01L21/31645 ,  H01L28/40

摘要： In a capacitor of an MIM (Metal-Insulator-Metal) structure, a silicon-containing high dielectric film (e.g., a hafnium silicate film) containing a silicon atom, as well as a silicon-free high dielectric film (e.g., a tantalum oxide film) containing no silicon atom is interposed between a lower electrode film and an upper electrode film which are made of metal or metal compound. By adding the silicon-containing high dielectric film, a leak current can be suppressed and the change in capacitor capacity accompanied with the change in applied voltage can be reduced.

摘要翻译： 在MIM（金属 - 绝缘体 - 金属）结构的电容器中，含有硅原子的含硅高电介质膜（例如，硅酸铪膜）以及无硅高介电膜（例如，钽 不含硅原子的氧化膜插入由金属或金属化合物制成的下电极膜和上电极膜之间。 通过添加含硅高介电膜，可以抑制泄漏电流，并且可以减少伴随施加电压变化的电容器容量的变化。

公开(公告)号：US20130234230A1

公开(公告)日：2013-09-12

申请号：US13415959

申请日：2012-03-09

申请人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

发明人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

IPC分类号： H01L27/105 ,  H01L21/225

CPC分类号： H01L21/2257 ,  H01L21/2236 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/41741 ,  H01L29/66666 ,  H01L29/7827

摘要： A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.

摘要翻译： 半导体器件包括：具有基底和从基底延伸的半导体柱阵列的衬底，衬底形成有多个沟槽，每个沟槽延伸到衬底中并且具有两个相对的沟槽侧壁; 第一绝缘衬垫层，其形成在每个沟槽的每个沟槽侧壁上，并且通过间隙留下每个沟槽侧壁的位形成表面，该间隙未被第一绝缘衬垫层覆盖; 以及多个掩埋位线，每个埋入位线从每个沟槽的相应一个沟槽侧壁的位形成表面延伸到基座中。

公开(公告)号：US20130157454A1

公开(公告)日：2013-06-20

申请号：US13327157

申请日：2011-12-15

申请人： Wei-Che CHANG ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

发明人： Wei-Che CHANG ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

IPC分类号： H01L21/28

CPC分类号： H01L29/66666 ,  H01L27/10876

摘要： A self-aligned wet etching process comprises the steps of: etching a substrate having an etch protection layer on a surface thereof to form a plurality of trenches spaced from each other; and sequentially forming an insulating layer, an etch stop layer and a primary insulator in each trench, wherein the primary insulator is filled inside an accommodation space surrounded by the etch stop layer. During the wet etching process, the etch stop layer protects the primary insulator from being etched, whereby is achieved anisotropic wet etching. Further, the present invention expands the contact areas for electrically connecting with external circuits and exempts the electric contactors formed on the contact areas from short circuit caused by excessively etching the primary insulators.

摘要翻译： 自对准湿蚀刻工艺包括以下步骤：在其表面上蚀刻具有蚀刻保护层的衬底，以形成彼此间隔开的多个沟槽; 并且在每个沟槽中依次形成绝缘层，蚀刻停止层和初级绝缘体，其中所述初级绝缘体填充在由所述蚀刻停止层包围的容纳空间的内部。 在湿蚀刻工艺期间，蚀刻停止层保护初级绝缘体不被蚀刻，从而实现各向异性湿蚀刻。 此外，本发明扩大了与外部电路电连接的接触面积，并且免除了形成在接触区域上的电接触器由于过度蚀刻初级绝缘体而引起的短路。

公开(公告)号：US08461056B1

公开(公告)日：2013-06-11

申请号：US13327157

申请日：2011-12-15

申请人： Wei-Che Chang ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

发明人： Wei-Che Chang ,  Chun-Hua Huang ,  Chung-Yung Ai ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Yu-Shan Hsu ,  Kazuaki Takesako ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wen Kuei Hsu ,  Chih-Wei Hsiung ,  Yukihiro Nagai ,  Yoshinori Tanaka

IPC分类号： H01L21/302

CPC分类号： H01L29/66666 ,  H01L27/10876

摘要： A self-aligned wet etching process comprises the steps of: etching a substrate having an etch protection layer on a surface thereof to form a plurality of trenches spaced from each other; and sequentially forming an insulating layer, an etch stop layer and a primary insulator in each trench, wherein the primary insulator is filled inside an accommodation space surrounded by the etch stop layer. During the wet etching process, the etch stop layer protects the primary insulator from being etched, whereby is achieved anisotropic wet etching. Further, the present invention expands the contact areas for electrically connecting with external circuits and exempts the electric contactors formed on the contact areas from short circuit caused by excessively etching the primary insulators.

摘要翻译： 自对准湿蚀刻工艺包括以下步骤：在其表面上蚀刻具有蚀刻保护层的衬底，以形成彼此间隔开的多个沟槽; 并且在每个沟槽中依次形成绝缘层，蚀刻停止层和初级绝缘体，其中所述初级绝缘体填充在由所述蚀刻停止层包围的容纳空间的内部。 在湿蚀刻工艺期间，蚀刻停止层保护初级绝缘体不被蚀刻，从而实现各向异性湿蚀刻。 此外，本发明扩大了与外部电路电连接的接触面积，并且免除了形成在接触区域上的电接触器由于过度蚀刻初级绝缘体而引起的短路。

公开(公告)号：US20050176261A1

公开(公告)日：2005-08-11

申请号：US10957827

申请日：2004-10-05

申请人： Takahito Umehara ,  Masahiko Tomita ,  Hirotake Fujita ,  Kazuhide Hasebe

发明人： Takahito Umehara ,  Masahiko Tomita ,  Hirotake Fujita ,  Kazuhide Hasebe

IPC分类号： C23C16/455 ,  C23C16/18 ,  C23C16/40 ,  H01L21/02 ,  H01L21/205 ,  H01L21/28 ,  H01L21/283 ,  H01L21/285 ,  H01L21/31 ,  H01L21/316 ,  H01L21/3205 ,  H01L21/768

CPC分类号： H01L21/76876 ,  C23C16/18 ,  C23C16/40 ,  C23C16/45525 ,  C23C16/45546 ,  H01L21/28556 ,  H01L21/28562 ,  H01L21/76843 ,  H01L28/65

摘要： A film-formation method for a semiconductor process includes seed film formation and main film formation. In the seed film formation, a metal-containing raw material gas and a first assist gas to react therewith are supplied into a process container, which accommodates a target substrate having an underlying layer, thereby forming a seed film on the underlying layer by CVD. In the main film formation, the raw material gas and a second assist gas to react therewith are supplied into the process container, thereby forming a main film on the seed film by CVD. The seed film formation includes first and second periods performed alternately and continuously. In each first period, the raw material gas is supplied into the process container while the first assist gas is stopped. In each second period, the first assist gas is supplied into the process container while the raw material gas is stopped.

摘要翻译： 半导体工艺的成膜方法包括种子膜形成和主要成膜。 在种子膜形成中，将含金属的原料气体和与其反应的第一辅助气体供给到容纳具有下层的目标基板的处理容器中，由此通过CVD在下层上形成种子膜。 在主成膜中，将原料气体和与其反应的第二辅助气体供给到处理容器中，由此通过CVD在种子膜上形成主膜。 种子膜形成包括交替且连续地执行的第一和第二周期。 在第一期间，在第一辅助气体停止的同时将原料气体供给到处理容器。 在第二期间，在停止原料气体的同时，将第一辅助气体供给到处理容器。

公开(公告)号：US08956961B2

公开(公告)日：2015-02-17

申请号：US13415959

申请日：2012-03-09

申请人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

发明人： Kazuaki Takesako ,  Wen-Kuei Hsu ,  Yoshinori Tanaka ,  Yukihiro Nagai ,  Chih-Wei Hsiung ,  Hirotake Fujita ,  Tomohiro Kadoya ,  Wei-Chih Liu ,  Hsuan-Yu Fang ,  Yu-Ling Huang ,  Meng-Hsien Chen ,  Chun-Chiao Tseng ,  Chung-Yung Ai ,  Yu-Shan Hsu ,  Wei-Che Chang ,  Chun-Hua Huang

IPC分类号： H01L21/02

CPC分类号： H01L21/2257 ,  H01L21/2236 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L29/41741 ,  H01L29/66666 ,  H01L29/7827

摘要： A semiconductor device includes: a substrate having a base and an array of semiconductor pillars extending from the base, the substrate being formed with a plurality of trenches, each of which extends into the base and has two opposing trench side walls; a first insulative liner layer formed on each of the trench side walls of each of the trenches and divided into upper and lower segments by a gap that leaves a bit-forming surface of each of the trench side walls uncovered by the first insulative liner layer; and a plurality of buried bit lines, each of which extends into the base from the bit-forming surface of a respective one of the trench side walls of each of the trenches.

摘要翻译： 半导体器件包括：具有基底和从基底延伸的半导体柱阵列的衬底，衬底形成有多个沟槽，每个沟槽延伸到衬底中并且具有两个相对的沟槽侧壁; 第一绝缘衬垫层，其形成在每个沟槽的每个沟槽侧壁上，并且通过间隙留下每个沟槽侧壁的位形成表面，该间隙未被第一绝缘衬垫层覆盖; 以及多个掩埋位线，每个埋入位线从每个沟槽的相应一个沟槽侧壁的位形成表面延伸到基座中。

公开(公告)号：US20050142305A1

公开(公告)日：2005-06-30

申请号：US10979449

申请日：2004-11-02

申请人： Mitsuru Kobayashi ,  Ikuko Furukawa ,  Hirotake Fujita ,  Tetsuo Tsuchida

发明人： Mitsuru Kobayashi ,  Ikuko Furukawa ,  Hirotake Fujita ,  Tetsuo Tsuchida

IPC分类号： B41M5/00 ,  B41M5/50 ,  B41M5/52

CPC分类号： B41M5/502 ,  B41M5/506 ,  B41M5/5218 ,  B41M5/5236 ,  B41M5/5254

摘要： Ink jet recording sheet having excellent glossiness, ink absorptivity, image quality, and long-term preservability in which cracks generated on an ink receiving layer are significantly reduced. The ink jet recording sheet includes a supporting medium; and an ink receiving layer including an inorganic fine particle, a cationic polymer, and a binder, wherein an average primary particle size of the inorganic fine particle is 30 nm or less, and the cationic polymer including: at least one structural unit (a1) expressed by a following general formula (1) or (2): wherein m and n independently represents an integer of 0 to 4, and X represents an acid residue; and at least one structural unit (a2) expressed by a following general formula (3), (4), (5) or (6): wherein R1 to R8 independently represents a hydrogen atom or a C1-C4 alkyl group, and Y and Z independently represents an acid residue.

摘要翻译： 具有优异的光泽度，油墨吸收性，图像质量以及在油墨接收层上产生的裂纹显着降低的长期保存性的喷墨记录纸。 喷墨记录纸包括支撑介质; 以及包含无机细颗粒，阳离子聚合物和粘合剂的油墨接收层，其中所述无机微粒的平均一次粒径为30nm以下，所述阳离子性高分子包含：至少一个结构单元（a1） 由以下通式（1）或（2）表示：其中m和n独立地表示0至4的整数，X表示酸残基; 和由以下通式（3），（4），（5）或（6）表示的至少一个结构单元（a2）：其中R 1至R 8 >独立地表示氢原子或C1-C4烷基，Y和Z独立地表示酸残基。