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    Graphics processing unit and graphics processing system
    2.
    发明授权
    Graphics processing unit and graphics processing system 失效

    公开(公告)号：US6049343A

    公开(公告)日：2000-04-11

    申请号：US9588

    申请日：1998-01-20

    申请人： Yuichi Abe ,  Ryo Fujita ,  Katsunori Suzuki ,  Kazuhisa Takami ,  Kazunori Oniki

    发明人： Yuichi Abe ,  Ryo Fujita ,  Katsunori Suzuki ,  Kazuhisa Takami ,  Kazunori Oniki

    IPC分类号： G06F1/03 ,  G06T1/20 ,  G06T15/50 ,  G06T1/00 ,  G06F15/00

    CPC分类号： G06T15/50 ,  G06F1/0307 ,  G06T1/20

    摘要： A device for controlling the table capacity smaller comprises a table of logarithms and a table of exponents preserving values of a logarithmic function and exponential function with a base of the second power, a multiplier, a shift unit for shifting the input value by a proper integer when the domain of logarithm is not included in the input value range of the table of logarithms, a logarithm addition unit for adding the shift amount to the value referred to in the table of logarithms, an exponent subtraction unit for subtracting a proper integer L from the input value when the domain of the exponential function is not included in the input value range of the table of exponents, and an exponent shift unit for shifting the referred value in the table of exponents the subtraction amount. A high-speed processing unit comprises a converter for converting floating-point data to fixed-point data having a bit of decimal point. By doing this, a structured graphics system can perform high-speed processing with a small table capacity.

    Graphics processing unit and graphics processing system
    3.
    发明申请
    Graphics processing unit and graphics processing system 审中-公开

    公开(公告)号：US20060250397A1

    公开(公告)日：2006-11-09

    申请号：US11484812

    申请日：2006-07-12

    申请人： Yuichi Abe ,  Ryo Fujita ,  Katsunori Suzuki ,  Kazuhisa Takami ,  Kazunori Oniki

    发明人： Yuichi Abe ,  Ryo Fujita ,  Katsunori Suzuki ,  Kazuhisa Takami ,  Kazunori Oniki

    IPC分类号： G06T15/50

    CPC分类号： G06T15/50 ,  G06F1/0307 ,  G06T1/20

    摘要： A device for controlling the table capacity smaller comprises a table of logarithms and a table of exponents preserving values of a logarithmic function and exponential function with a base of the second power, a multiplier, a shift unit for shifting the input value by a proper integer when the domain of logarithm is not included in the input value range of the table of logarithms, a logarithm addition unit for adding the shift amount to the value referred to in the table of logarithms, an exponent subtraction unit for subtracting a proper integer L from the input value when the domain of the exponential function is not included in the input value range of the table of exponents, and an exponent shift unit for shifting the referred value in the table of exponents the subtraction amount. A high-speed processing unit comprises a converter for converting floating-point data to fixed-point data having a bit of decimal point. By doing this, a structured graphics system can perform high-speed processing with a small table capacity.

    Graphics display system including parallel graphics processors executing Bresenham's algorithm
    5.
    发明授权
    Graphics display system including parallel graphics processors executing Bresenham's algorithm 失效
    图形显示系统包括执行Bresenham算法的并行图形处理器

    公开(公告)号：US5847715A

    公开(公告)日：1998-12-08

    申请号：US856081

    申请日：1997-05-14

    申请人： Ryo Fujita ,  Kazuhisa Takami ,  Mitsuru Soga ,  Koji Ozawa ,  Takaharu Morishige ,  Kazuyoshi Koga

    发明人： Ryo Fujita ,  Kazuhisa Takami ,  Mitsuru Soga ,  Koji Ozawa ,  Takaharu Morishige ,  Kazuyoshi Koga

    IPC分类号： G06T1/20 ,  G06T11/20 ,  G06F17/10

    CPC分类号： G06T11/203 ,  G06T1/20

    摘要： A graphics display system includes a host processor calculating graphic data and providing the graphic data to a graphics processor, and frame memories which store the graphic pixel data and supply display data to display devices. The graphics display system also includes a first register group which stores the graphics data, a second register group which converts and/or stores the data in the first register group, a pixel generator which generates pixels according to the graphic data in the second register group, and a plotter which writes the pixel data generated in the pixel generator in the frame memories. The second register group fetches the data from the first register group when the host processor issues a command for plotting, holds the data previously written by the host processor. At the same time, when the host processor issues a command for plotting, the specified graphic type is written in the graphic processor as well as data calculated based on the first and second register groups.

    摘要翻译： 图形显示系统包括主处理器，其计算图形数据并将图形数据提供给图形处理器，以及存储图形像素数据并向显示装置提供显示数据的帧存储器。 图形显示系统还包括存储图形数据的第一寄存器组，在第一寄存器组中转换和/或存储数据的第二寄存器组，根据第二寄存器组中的图形数据生成像素的像素生成器 ，以及将在像素生成器中生成的像素数据写入帧存储器的绘图仪。 当主机处理器发出绘制命令时，第二个寄存器组从第一个寄存器组中获取数据，保存由主机处理器先前写入的数据。 同时，当主机处理器发出绘制命令时，指定的图形类型被写入图形处理器以及基于第一和第二寄存器组计算的数据。

    Graphics display system including graphics processor having a register storing a series of vertex data relating to a polygonal line
    6.
    发明授权
    Graphics display system including graphics processor having a register storing a series of vertex data relating to a polygonal line 失效
    图形显示系统，包括具有存储与多边形线相关的一系列顶点数据的寄存器的图形处理器

    公开(公告)号：US5666520A

    公开(公告)日：1997-09-09

    申请号：US215244

    申请日：1994-03-21

    申请人： Ryo Fujita ,  Kazuhisa Takami ,  Mitsuru Soga ,  Koji Ozawa ,  Takaharu Morishige ,  Kazuyoshi Koga

    发明人： Ryo Fujita ,  Kazuhisa Takami ,  Mitsuru Soga ,  Koji Ozawa ,  Takaharu Morishige ,  Kazuyoshi Koga

    IPC分类号： G06T1/20 ,  G06T11/20 ,  G06F12/00

    CPC分类号： G06T11/203 ,  G06T1/20

    摘要： A graphics display system includes a host processor calculating graphic data and providing the graphic data to a graphics processor, and frame memories which store the graphic pixel data and supply display data to display devices. The graphics display system also includes a first register group which stores the graphics data, a second register group which converts and/or stores the data in the first register group, a pixel generator which generates pixels according to the graphic data in the second register group, and a plotter which writes the pixel data generated in the pixel generator in the frame memories. The second register group fetches the data from the first register group when the host processor issues a command for plotting, holds the data previously written by the host processor. At the same time, when the host processor issues a command for plotting, the specified graphic type is written in the graphic processor as sell as data calculated based on the first and second register groups.

    摘要翻译： 图形显示系统包括主处理器，其计算图形数据并将图形数据提供给图形处理器，以及存储图形像素数据并向显示装置提供显示数据的帧存储器。 图形显示系统还包括存储图形数据的第一寄存器组，在第一寄存器组中转换和/或存储数据的第二寄存器组，根据第二寄存器组中的图形数据生成像素的像素生成器 ，以及将在像素生成器中生成的像素数据写入帧存储器的绘图仪。 当主机处理器发出绘制命令时，第二个寄存器组从第一个寄存器组中获取数据，保存由主机处理器先前写入的数据。 同时，当主机处理器发出用于绘图的命令时，指定的图形类型以作为基于第一和第二寄存器组计算的数据作为卖出而被写入图形处理器。

    Graphics system
    8.
    发明授权
    Graphics system 失效
    图形系统

    公开(公告)号：US06266072B1

    公开(公告)日：2001-07-24

    申请号：US08930674

    申请日：1997-10-03

    申请人： Kazuyoshi Koga ,  Ryo Fujita ,  Koyo Katsura ,  Katsunori Suzuki ,  Toshiyuki Kuwana

    发明人： Kazuyoshi Koga ,  Ryo Fujita ,  Koyo Katsura ,  Katsunori Suzuki ,  Toshiyuki Kuwana

    IPC分类号： G06F1580

    CPC分类号： G06T15/503 ,  G06T11/00

    摘要： A graphics system which accelerates generation of pixels including transparent objects by simply adding more rendering devices. The system has composition means and a plurality of rendering devices each comprising a geometric processor, a rendering processor and a frame memory that holds color, depth and weight data in a screen bit map format. Given a plurality of sets of color, depth and weight data about any one pixel position from the frame memories, the composition means first compares the depth data, and multiplies successively the weight and color data starting with those corresponding to the depth data closest to the foreground, thereby generating new pixel data. The system thus permits merging of transparent objects.

    摘要翻译： 一种图形系统，通过简单地添加更多的渲染设备来加速像素的生成，包括透明对象。 该系统具有组合装置和多个渲染装置，每个渲染装置包括几何处理器，渲染处理器和以屏幕位图格式保存颜色，深度和重量数据的帧存储器。 给定关于来自帧存储器的任何一个像素位置的多组颜色，深度和重量数据，合成装置首先比较深度数据，并且从与最接近 前景，从而生成新的像素数据。 因此，该系统允许透明对象的合并。

    Three-dimensional graphic display apparatus with improved high-speed anti-aliasing
    9.
    发明授权
    Three-dimensional graphic display apparatus with improved high-speed anti-aliasing 失效
    具有改进的高速抗锯齿的三维图形显示装置

    公开(公告)号：US5982376A

    公开(公告)日：1999-11-09

    申请号：US607246

    申请日：1996-02-14

    申请人： Yuichi Abe ,  Ryo Fujita ,  Mitsuru Soga ,  Kazuyoshi Koga

    发明人： Yuichi Abe ,  Ryo Fujita ,  Mitsuru Soga ,  Kazuyoshi Koga

    IPC分类号： G09G5/36 ,  G06T11/20 ,  G06T15/40 ,  G06T15/00

    CPC分类号： G06T15/40

    摘要： A novel graphic display apparatus in which the pixel information for a multiplicity of layers arranged according to Z value including the color, the proportion in which the figure occupies the pixel and the Z value are held for each layer in a pixel memory. The Z value is compared between the pixel information of a newly-plotted figure and the multi-tiered pixel information held in the pixel information memory. In order to reduce the amount of memory space required, the pixel information stored in the bottom layer of the pixel memory is a combination of information synthesized from the color information having the Z value of the bottom layer and from at least one other layer having a Z value lower than the Z value associated with said bottom layer. In the case where the Z values are substantially equal to each other, the mask values included in each pixel information are summed and the pixel information to be written in the pixel information memory is determined by a pixel information computing section.

    摘要翻译： 一种新颖的图形显示装置，其中，针对像素存储器中的每个层保持根据Z值包括多个层的像素信息，包括颜色，图像占据像素的比例和Z值。 在新绘制的图形的像素信息和保持在像素信息存储器中的多层像素信息之间比较Z值。 为了减少所需的存储空间量，存储在像素存储器的底层中的像素信息是从具有底层的Z值的颜色信息和至少一个具有 Z值低于与所述底层相关联的Z值。 在Z值基本上彼此相等的情况下，将包括在每个像素信息中的掩码值相加，并且由像素信息计算部分确定要写入像素信息存储器的像素信息。

    Storage Device and Computer Using the Same
    10.
    发明申请
    Storage Device and Computer Using the Same 审中-公开
    存储设备和使用其的计算机

    公开(公告)号：US20120215965A1

    公开(公告)日：2012-08-23

    申请号：US13372800

    申请日：2012-02-14

    申请人： Ryoichi Inada ,  Ryo Fujita ,  Takuma Nishimura ,  Koji Matsuda

    发明人： Ryoichi Inada ,  Ryo Fujita ,  Takuma Nishimura ,  Koji Matsuda

    IPC分类号： G06F12/10 ,  G06F12/08

    CPC分类号： G06F12/0246 ,  G06F12/1027 ,  G06F2212/7201

    摘要： A nonvolatile memory stores therein a plurality of partitioned translation tables which are created by partitioning a logical-to-physical address translation table in a page unit. A RAM stores therein a logical-to-physical address translation table cache for storing at least the one or more partitioned translation tables, a translation-table management table for managing the partitioned translation tables, and a cache management table for managing the logical-to-physical address translation table cache. The translation-table management table includes a cache presence-or-absence flag and a cache entry number, the cache presence-or-absence flag being used for indicating that the partitioned translation tables are stored into the logical-to-physical address translation table cache, the cache entry number being used for indicating storage destinations of the partitioned translation tables in the logical-to-physical address translation table cache. Reading/writing processings of information in the logical-to-physical address translation table between the nonvolatile memory and the RAM are performed in the page unit.

    摘要翻译： 非易失性存储器中存储有通过在页面单元中划分逻辑到物理地址转换表而创建的多个分区转换表。 RAM中存储有至少存储一个或多个分区转换表的逻辑到物理地址转换表缓存，用于管理分区转换表的转换表管理表，以及用于管理逻辑到 物理地址转换表缓存。 翻译表管理表包括高速缓存存在或不存在标志和高速缓存条目号，高速缓存存在或不存在标志用于指示分区转换表被存储到逻辑到物理地址转换表中 高速缓存，用于指示逻辑到物理地址转换表缓存中的分区转换表的存储目的地的高速缓存条目号。 在页面单元中执行在非易失性存储器和RAM之间的逻辑到物理地址转换表中的信息的读/写处理。