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公开(公告)号:US06995968B2
公开(公告)日:2006-02-07
申请号:US10951941
申请日:2004-09-29
申请人: Kazushige Ito , Shunichi Yuri , Yukie Nakano , Mari Miyauchi , Takako Hibi , Daisuke Iwanaga , Masakazu Hosono
发明人: Kazushige Ito , Shunichi Yuri , Yukie Nakano , Mari Miyauchi , Takako Hibi , Daisuke Iwanaga , Masakazu Hosono
IPC分类号: H01G4/06
CPC分类号: H01G4/1227 , C04B35/468 , H01G4/30
摘要: In order to provide dielectric ceramic composition having low IR defect rate and high relative dielectric constant even when the multilayer ceramic capacitor is made thinner, dielectric ceramic composition including a main component expressed by a composition formula {{Ba(1-x)Cax}O}A{Ti(1-y-z)ZryMgz}BO2 and subcomponents of Mn oxide, Y oxide, V oxide and Si oxide is provided. In the above formula, A, B, x, y and z are as follows: 0.995≦A/B≦1.020, 0.0001≦x≦0.07, preferably 0.001≦x
摘要翻译: 为了提供具有低IR缺陷率和高相对介电常数的介电陶瓷组合物,即使当多层陶瓷电容器制得更薄时,包括由组成式{{Ba(1-x) (1-yz)Zr y>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> 提供了Mn氧化物,Y氧化物,V氧化物和Si氧化物的次要成分。 在上式中,A,B,x,y和z如下:0.995 <= A / B <= 1.020,0.0001 <= x <= 0.07,优选0.001 <= x <0.05,0.1 <= y < 0.3和0.0005 <= z <= 0.01,优选0.003 <= z <= 0.01。
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公开(公告)号:US06493207B2
公开(公告)日:2002-12-10
申请号:US09887927
申请日:2001-06-26
申请人: Yukie Nakano , Takako Hibi , Mari Miyauchi , Daisuke Iwanaga
发明人: Yukie Nakano , Takako Hibi , Mari Miyauchi , Daisuke Iwanaga
IPC分类号: H01G4228
CPC分类号: H01G4/0085 , H01G4/30
摘要: The invention provides a multilayer ceramic capacitor capable of preventing the occurrence of cracks by inhibiting the multilayer capacitor from expanding in a stacking direction and a width direction. The multilayer ceramic capacitor includes a capacitor element (10) in which dielectric layers (11a and 11b) and internal electrodes (12) are alternately stacked. The capacitor element (10) is obtained by stacking and firing a dielectric paste layer and an internal electrode paste layer. An expansion coefficient x in the stacking direction lies between −0.05i% and 0.05i% inclusive, where i denotes the number of dielectric layers (11a), preferably the expansion coefficient x is 0% or less, or more preferably the expansion coefficient x lies between −10% and 0% inclusive. Preferably, an expansion coefficient y in the width direction lies between −0.05i% and 0% inclusive. The expansion coefficients x and y can be controlled by adding a carbon material or a lithium-containing compound to the internal electrode paste layer, or by reducing a thickness of the dielectric layer (11b) located in an outermost portion. Thus, the occurrence of cracks is inhibited, and therefore a fraction defective is reduced.
摘要翻译: 本发明提供一种能够通过抑制层叠电容器在堆叠方向和宽度方向上扩展来防止发生裂纹的多层陶瓷电容器。 多层陶瓷电容器包括其中电介质层(11a和11b)和内部电极(12)交替堆叠的电容器元件(10)。 电容器元件(10)通过堆叠和烧结电介质浆料层和内部电极浆料层而获得。 叠层方向的膨胀系数x在-0.05i%〜0.05i%的范围内,其中i表示介电层数(11a),优选膨胀系数x为0%以下,更优选膨胀系数x 在-10%至0%之间。 优选地,宽度方向上的膨胀系数y在-0.05%和0%之间。 膨胀系数x和y可以通过向内部电极浆料层中添加碳材料或含锂化合物,或通过减小位于最外部的电介质层(11b)的厚度来控制。 因此,可以抑制裂缝的发生,因此能够降低部分缺陷。
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公开(公告)号:US20050111163A1
公开(公告)日:2005-05-26
申请号:US10951941
申请日:2004-09-29
申请人: Kazushige Ito , Shunichi Yuri , Yukie Nakano , Mari Miyauchi , Takako Hibi , Daisuke Iwanaga , Masakazu Hosono
发明人: Kazushige Ito , Shunichi Yuri , Yukie Nakano , Mari Miyauchi , Takako Hibi , Daisuke Iwanaga , Masakazu Hosono
CPC分类号: H01G4/1227 , C04B35/468 , H01G4/30
摘要: In order to provide dielectric ceramic composition having low IR defect rate and high relative dielectric constant even when the multilayer ceramic capacitor is made thinner, dielectric ceramic composition including a main component expressed by a composition formula {{Ba(1-x)Cax}O}A{Ti(1-y-z)ZryMgz}BO2 and subcomponents of Mn oxide, Y oxide, V oxide and Si oxide is provided. In the above formula, A, B, x , y and z are as follows: 0.995≦A/B≦1.020, 0.0001≦x≦0.07, preferably 0.001≦x≦0.05, 0.1≦y≦0.3 and 0.0005≦z≦0.0 1, preferably 0.003≦z≦0.0 1.
摘要翻译: 为了提供具有低IR缺陷率和高相对介电常数的介电陶瓷组合物,即使当多层陶瓷电容器制得更薄时,包括由组成式{{Ba(1-x) (1-yz)Zr y>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>> 提供了Mn氧化物,Y氧化物,V氧化物和Si氧化物的次要成分。 在上式中,A,B,x,y和z如下:0.995 <= A / B <= 1.020,0.0001 <= x <= 0.07,优选0.001 <= x <= 0.05,0.1 < = 0.3和0.0005 <= z <= 0.0 1,优选0.003 <= z <= 0.0 1。
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公开(公告)号:US07335329B2
公开(公告)日:2008-02-26
申请号:US10633686
申请日:2003-08-05
申请人: Yukie Nakano , Shunichi Yuri , Mari Miyauchi , Daisuke Iwanaga
发明人: Yukie Nakano , Shunichi Yuri , Mari Miyauchi , Daisuke Iwanaga
CPC分类号: H01G4/12 , H01G4/232 , H01G4/30 , Y10T29/417
摘要: A method of producing a multilayer ceramic capacitor having internal electrode layers and dielectric layers with dielectric particles is disclosed. An average particle diameter of the dielectric particles, when measured parallel with the direction of the internal electrode layers, is larger than a thickness of the dielectric layer. A ratio (R/d) between the average particle diameter (R) and the thickness (d) of the dielectric layer is 1
摘要翻译: 公开了一种制造具有内部电极层和具有电介质颗粒的电介质层的多层陶瓷电容器的方法。 当与内部电极层的方向平行地测量时,电介质颗粒的平均粒径大于介电层的厚度。 介电层的平均粒径(R)与厚度(d)之比(R / d)为1
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公开(公告)号:US06785121B2
公开(公告)日:2004-08-31
申请号:US09865575
申请日:2001-05-29
申请人: Yukie Nakano , Shunichi Yuri , Mari Miyauchi , Daisuke Iwanaga
发明人: Yukie Nakano , Shunichi Yuri , Mari Miyauchi , Daisuke Iwanaga
IPC分类号: H01G406
CPC分类号: H01G4/12 , H01G4/232 , H01G4/30 , Y10T29/417
摘要: A multilayer ceramic capacitor having internal electrode layers and dielectric layers with dielectric particles is disclosed. An average particle diameter of the dielectric particles, when measured parallel with the direction of the internal electrode layers, is larger than a thickness of the dielectric layer. A ratio (R/d) between the average particle diameter (R) and the thickness (d) of the dielectric layer is 1
摘要翻译: 公开了一种具有内部电极层和具有介电颗粒的电介质层的多层陶瓷电容器。 当与内部电极层的方向平行地测量时,电介质颗粒的平均粒径大于介电层的厚度。 介电层的平均粒径(R)和厚度(d)之比(R / d)为1
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公开(公告)号:US20080006365A1
公开(公告)日:2008-01-10
申请号:US11896060
申请日:2007-08-29
申请人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
发明人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
CPC分类号: C04B35/638 , B32B18/00 , B32B2311/22 , C04B35/4682 , C04B35/49 , C04B35/63 , C04B35/634 , C04B35/63424 , C04B35/64 , C04B2235/3203 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3236 , C04B2235/3239 , C04B2235/3241 , C04B2235/3248 , C04B2235/3262 , C04B2235/3409 , C04B2235/3418 , C04B2235/3436 , C04B2235/6562 , C04B2235/6565 , C04B2235/6567 , C04B2235/658 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/662 , C04B2235/79 , C04B2237/346 , C04B2237/348 , C04B2237/40 , C04B2237/405 , C04B2237/704 , C04B2237/706 , H01G4/1245 , H01G4/30
摘要: A method of producing a multilayer ceramic electronic device, having a firing step for firing a pre-firing element body wherein a plurality of dielectric layers and internal electrode layers containing a base metal are alternately arranged, characterized in that the firing step has a temperature raising step for raising a temperature to a firing temperature, and hydrogen is continued to be introduced from a point in time of the temperature raising step. According to the method, it is possible to provide a method of producing a multilayer ceramic electronic device, such as a multilayer ceramic capacitor, wherein shape anisotropy and other structural defaults are hard to occur and electric characteristics are improved while suppressing deterioration thereof even if dielectric layers becomes thinner and stacked more.
摘要翻译: 一种制造多层陶瓷电子器件的方法,具有烧结步骤,用于焙烧预烧元件体,其中多个电介质层和含有贱金属的内电极层交替布置,其特征在于,所述烧制步骤具有升温 将温度升高到烧成温度的步骤,并且从升温步骤的时间点继续导入氢。 根据该方法,可以提供一种制造多层陶瓷电容器的方法,例如多层陶瓷电容器,其中形状各向异性和其它结构缺陷难以发生,并且电特性得到改善,同时抑制其劣化,即使电介质 层变得更薄并且堆叠更多。
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公开(公告)号:US07578896B2
公开(公告)日:2009-08-25
申请号:US11896060
申请日:2007-08-29
申请人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
发明人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
CPC分类号: C04B35/638 , B32B18/00 , B32B2311/22 , C04B35/4682 , C04B35/49 , C04B35/63 , C04B35/634 , C04B35/63424 , C04B35/64 , C04B2235/3203 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3236 , C04B2235/3239 , C04B2235/3241 , C04B2235/3248 , C04B2235/3262 , C04B2235/3409 , C04B2235/3418 , C04B2235/3436 , C04B2235/6562 , C04B2235/6565 , C04B2235/6567 , C04B2235/658 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/662 , C04B2235/79 , C04B2237/346 , C04B2237/348 , C04B2237/40 , C04B2237/405 , C04B2237/704 , C04B2237/706 , H01G4/1245 , H01G4/30
摘要: A method of producing a multilayer ceramic electronic device, having a firing step for firing a pre-firing element body wherein a plurality of dielectric layers and internal electrode layers containing a base metal are alternately arranged, characterized in that the firing step has a temperature raising step for raising a temperature to a firing temperature, and hydrogen is continued to be introduced from a point in time of the temperature raising step. According to the method, it is possible to provide a method of producing a multilayer ceramic electronic device, such as a multilayer ceramic capacitor, wherein shape anisotropy and other structural defaults are hard to occur and electric characteristics are improved while suppressing deterioration thereof even if dielectric layers becomes thinner and stacked more.
摘要翻译: 一种制造多层陶瓷电子器件的方法,具有烧结步骤,用于焙烧预烧元件体,其中多个电介质层和含有贱金属的内电极层交替布置,其特征在于,所述烧制步骤具有升温 将温度升高到烧成温度的步骤,并且从升温步骤的时间点继续导入氢。 根据该方法,可以提供一种制造多层陶瓷电容器的方法,例如多层陶瓷电容器,其中形状各向异性和其它结构缺陷难以发生,并且电特性得到改善,同时抑制其劣化,即使电介质 层变得更薄并且堆叠更多。
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公开(公告)号:US07276130B2
公开(公告)日:2007-10-02
申请号:US10296993
申请日:2002-04-12
申请人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
发明人: Takako Hibi , Yukie Nakano , Shunichi Yuri , Takahiro Ushijima , Akira Sato , Wataru Takahara , Masako Yoshii
CPC分类号: C04B35/638 , B32B18/00 , B32B2311/22 , C04B35/4682 , C04B35/49 , C04B35/63 , C04B35/634 , C04B35/63424 , C04B35/64 , C04B2235/3203 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3227 , C04B2235/3229 , C04B2235/3236 , C04B2235/3239 , C04B2235/3241 , C04B2235/3248 , C04B2235/3262 , C04B2235/3409 , C04B2235/3418 , C04B2235/3436 , C04B2235/6562 , C04B2235/6565 , C04B2235/6567 , C04B2235/658 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/662 , C04B2235/79 , C04B2237/346 , C04B2237/348 , C04B2237/40 , C04B2237/405 , C04B2237/704 , C04B2237/706 , H01G4/1245 , H01G4/30
摘要: A method of producing a multilayer ceramic electronic device, having a firing step for firing a pre-firing element body wherein a plurality of dielectric layers and internal electrode layers containing a base metal are alternately arranged, characterized in that the firing step has a temperature raising step for raising a temperature to a firing temperature, and hydrogen is continued to be introduced from a point in time of the temperature raising step. According to the method, it is possible to provide a method of producing a multilayer ceramic electronic device, such as a multilayer ceramic capacitor, wherein shape anisotropy and other structural defaults are hard to occur and electric characteristics are improved while suppressing deterioration thereof even if dielectric layers becomes thinner and stacked more.
摘要翻译: 一种制造多层陶瓷电子器件的方法,具有烧结步骤,用于焙烧预烧元件体,其中多个电介质层和含有贱金属的内电极层交替布置,其特征在于,所述烧制步骤具有升温 将温度升高到烧成温度的步骤,并且从升温步骤的时间点继续导入氢。 根据该方法,可以提供一种制造多层陶瓷电容器的方法,例如多层陶瓷电容器,其中形状各向异性和其它结构缺陷难以发生,并且电特性得到改善,同时抑制其劣化,即使电介质 层变得更薄并且堆叠更多。
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公开(公告)号:US20050152095A1
公开(公告)日:2005-07-14
申请号:US11030194
申请日:2005-01-07
申请人: Yukie Nakano , Mari Miyauchi , Akira Sato
发明人: Yukie Nakano , Mari Miyauchi , Akira Sato
CPC分类号: H01G4/30 , H01G4/1227 , Y10T29/435
摘要: The invention aims to provide a multilayer ceramic capacitor with high dielectric constant, a high capacitance, and an excellent reliability by eliminating oxygen vacancy in dielectric layers and suppressing oxidation of Ni inner electrodes. The multilayer ceramic capacitor comprises a multilayered dielectric body composed by alternately piling up dielectric layers containing mainly barium titanate and inner electrode layers containing mainly Ni and a first hetero-phase containing Mg—Si—O as constituent elements exists in the capacitor.
摘要翻译: 本发明旨在通过消除介电层中的氧空位和抑制Ni内电极的氧化来提供具有高介电常数,高电容性和优异可靠性的多层陶瓷电容器。 该多层陶瓷电容器包括多层电介质体,该层叠电介质体主要由主要包含钛酸钡的电介质层和主要含有Ni的内部电极层和含有Mg-Si-O的第一异质相作为构成元素交替堆积而构成。
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公开(公告)号:US07006345B2
公开(公告)日:2006-02-28
申请号:US11030194
申请日:2005-01-07
申请人: Yukie Nakano , Mari Miyauchi , Akira Sato
发明人: Yukie Nakano , Mari Miyauchi , Akira Sato
CPC分类号: H01G4/30 , H01G4/1227 , Y10T29/435
摘要: The invention aims to provide a multilayer ceramic capacitor with high dielectric constant, a high capacitance, and an excellent reliability by eliminating oxygen vacancy in dielectric layers and suppressing oxidation of Ni inner electrodes. The multilayer ceramic capacitor comprises a multilayered dielectric body composed by alternately piling up dielectric layers containing mainly barium titanate and inner electrode layers containing mainly Ni and a first hetero-phase containing Mg—Si—O as constituent elements exists in the capacitor.
摘要翻译: 本发明旨在通过消除介电层中的氧空位和抑制Ni内电极的氧化来提供具有高介电常数,高电容性和优异可靠性的多层陶瓷电容器。 该多层陶瓷电容器包括多层电介质体,该层叠电介质体主要由主要包含钛酸钡的电介质层和主要含有Ni的内部电极层和含有Mg-Si-O的第一异质相作为构成元素交替堆积而构成。
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