摘要:
A display substrate includes source lines, gate lines, an output pad part, a fan-out part and a first voltage line part. The source lines are in a display area. The gate lines cross the source lines. The output pad part is in a peripheral area surrounding the display area and is electrically connected to output terminals of a driving chip. The fan-out part is electrically connected between the output pad part and the source lines. The first voltage line part is inclined with respect to a central line of a chip area in which the driving chip is mounted toward opposite sides of the chip area to cross the fan-out part. Therefore, the line reactance of the fan-out part is decreased and the uniformity of the line resistance of the fan-out part is increased to improve image display quality.
摘要:
A display substrate includes an output pads section, a fan-out section, a first power wiring section and a first conductive pattern. The output pads section is electrically connected to a plurality of output terminals of a first driver chip. The fan-out section electrically connects the output pads section to a plurality of source wirings. The first power wiring section is extended along a longitudinal direction of a plurality of gate wirings that cross with source wirings of the display substrate. The first power wiring section propagates at least first and second power-delivering voltages to the driver chip. The first conductive pattern is insulatively overlapped with the first power wiring section in an intermediate area between the output pads sections of an adjacent second driver chip. The first conductive pattern thereby defines a capacitive shunting path for voltage transients or ripples.
摘要:
A display substrate includes source lines, gate lines, an output pad part, a fan-out part and a first voltage line part. The source lines are in a display area. The gate lines cross the source lines. The output pad part is in a peripheral area surrounding the display area and is electrically connected to output terminals of a driving chip. The fan-out part is electrically connected between the output pad part and the source lines. The first voltage line part is inclined with respect to a central line of a chip area in which the driving chip is mounted toward opposite sides of the chip area to cross the fan-out part. Therefore, the line reactance of the fan-out part is decreased and the uniformity of the line resistance of the fan-out part is increased to improve image display quality.
摘要:
A gate driver circuit includes a driving section and a wiring section. The wiring section receives a plurality of signals from an external device. The driving section includes a plurality of stages providing a plurality of gate lines with a gate signal. The wiring section includes first and second signal wirings. The first signal wiring is disposed adjacent to a first side of the driving section, where the first side receives the signals from the wiring section. The second signal wiring is disposed adjacent to a portion that is disposed at an outer side of the driving section and the first signal wiring. Therefore, a signal applied to the first signal wiring is prevented from being delayed by the second signal wiring. Furthermore, a distortion of signal applied to the gate driver and a maloperation of the gate driver are prevented.
摘要:
A gate driver circuit includes a driving section and a wiring section. The wiring section receives a plurality of signals from an external device. The driving section includes a plurality of stages providing a plurality of gate lines with a gate signal. The wiring section includes first and second signal wirings. The first signal wiring is disposed adjacent to a first side of the driving section, where the first side receives the signals from the wiring section. The second signal wiring is disposed adjacent to a portion that is disposed at an outer side of the driving section and the first signal wiring. Therefore, a signal applied to the first signal wiring is prevented from being delayed by the second signal wiring. Furthermore, a distortion of signal applied to the gate driver and a maloperation of the gate driver are prevented.
摘要:
In a driving unit (e.g., a gate driving unit) and a flat panel display apparatus having the driving unit, a circuit portion of the driving unit includes a plurality of driving stages cascade-connected to one another and outputs a (gate) driver signal (a plurality of gate-driving signals) based on a plurality of control signals. The line portion comprises a first signal line and a second signal line, each of which transmits control signals from the outside, and a first connection line connecting the first signal line to the driving stages, and a second connection line connecting the second signal line to the driving stages. The second signal line is positioned at a different (metallization) layer from the first signal line and the first and second connection lines. Therefore, malfunctioning of the driving unit caused by corrosion may be prevented.
摘要:
A display apparatus includes a display panel including gate and data lines disposed thereon, and a plurality of driver integrated circuits (“ICs”) on the display panel and electrically connected to data lines. Flexible printed circuit boards (“FPCBs”) are disposed on the display panel and a printed circuit board to apply the control signal and the image signal from the printed circuit board to the driver ICs. There are less FPCBs than driver ICs. The driver ICs are divided into first and second driver groups; the data lines are divided into first and second groups of data lines. Driver ICs of the first driver group are directly connected to corresponding FPCBs, and driver ICs of the second driver group are connected to adjacent driver ICs. Each driver integrated circuit of the first driver group outputs a first repair signal to repair a data line of the first group of data lines.
摘要:
In a display substrate and a display device having the display substrate for reducing a line resistance, the display substrate includes a plurality of pixel parts, a signal line part and a signal pad part. The pixel parts are formed in a display area. The signal line part is formed in a peripheral area surrounding the display area. The signal line part includes a first line formed with a first conductive layer, and a second line formed with a second conductive layer over the first line. The second line overlaps the first line. The signal pad part includes a first pad integrally formed with the first line, and a second pad integrally formed with the second line, wherein an identical driving signal is applied to the first pad and the second pad. Accordingly, the line resistance of the signal line part may be reduced.
摘要:
In a display substrate and a display device having the display substrate for reducing a line resistance, the display substrate includes a plurality of pixel parts, a signal line part and a signal pad part. The pixel parts are formed in a display area. The signal line part is formed in a peripheral area surrounding the display area. The signal line part includes a first line formed with a first conductive layer, and a second line formed with a second conductive layer over the first line. The second line overlaps the first line. The signal pad part includes a first pad integrally formed with the first line, and a second pad integrally formed with the second line, wherein an identical driving signal is applied to the first pad and the second pad. Accordingly, the line resistance of the signal line part may be reduced.
摘要:
A liquid crystal display capable of operating with little parasitic capacitance variation is presented. The display includes a substrate, a gate line disposed on the substrate, a storage electrode line disposed on the substrate and having a main portion that extends parallel with the gate line, a data line crossing the gate line and the storage electrode line and including a source electrode, a drain electrode facing the source electrode; and a pixel electrode connected to the drain electrode, wherein the storage electrode line includes a plurality of storage electrodes extending from the main portion in the same direction as the data line, and the storage electrodes overlap different regions of the data line.