公开(公告)号：US07742116B2

公开(公告)日：2010-06-22

申请号：US11869866

申请日：2007-10-10

申请人： Young-Je Cho ,  Yun-Seok Lee ,  Cheon-Jae Maeng ,  Byung-Hyun Kim

发明人： Young-Je Cho ,  Yun-Seok Lee ,  Cheon-Jae Maeng ,  Byung-Hyun Kim

IPC分类号： G02F1/1343

CPC分类号： G02F1/136213 ,  G02F1/133514 ,  G02F1/1341 ,  G02F2001/134318

摘要： A display panel and a method of manufacturing the same in which a storage electrode is formed on a first base substrate, and an insulating layer is formed on the first base substrate to cover the storage electrode. The insulating layer is recessed directly above the storage electrode. A pixel electrode faces the storage electrode and is formed on the insulating layer. A protruding portion is formed on a second base substrate facing the first base substrate. The protruding portion protrudes toward a concaved portion of the insulating layer.

摘要翻译： 一种显示面板及其制造方法，其中存储电极形成在第一基底基板上，并且绝缘层形成在第一基底基板上以覆盖存储电极。 绝缘层直接凹入存储电极的正上方。 像素电极面对存储电极并形成在绝缘层上。 突出部形成在面向第一基底的第二基底基板上。 突出部朝向绝缘层的凹部突出。

公开(公告)号：US20080149933A1

公开(公告)日：2008-06-26

申请号：US11981872

申请日：2007-10-31

申请人： Cheon-Jae Maeng ,  Yun-Seok Lee ,  Young-Je Cho ,  You-Hyun Jeong ,  Byung-Hyun Kim

发明人： Cheon-Jae Maeng ,  Yun-Seok Lee ,  Young-Je Cho ,  You-Hyun Jeong ,  Byung-Hyun Kim

IPC分类号： H01L29/04

CPC分类号： G02F1/13394 ,  G02F1/133512 ,  G02F1/136213

摘要： A display panel includes a first substrate, a second substrate and a spacer. The first substrate includes a gate line, a data line crossing the gate line to define a pixel area, and a storage electrode formed in the pixel area. The second substrate is coupled with the first substrate and includes a first black matrix corresponding to the storage electrode. The spacer is interposed between the first and second substrates to allow the first and second substrates are spaced apart from each other. Thus, an aperture ratio of the display panel may be improved and a manufacturing cost of the display panel may be reduced.

摘要翻译： 显示面板包括第一基板，第二基板和间隔件。 第一衬底包括栅极线，与栅极线交叉以限定像素区域的数据线，以及形成在像素区域中的存储电极。 第二衬底与第一衬底耦合并且包括对应于存储电极的第一黑矩阵。 间隔件介于第一和第二基板之间以允许第一和第二基板彼此间隔开。 因此，可以提高显示面板的开口率，并且可以降低显示面板的制造成本。

公开(公告)号：US20100188624A1

公开(公告)日：2010-07-29

申请号：US12726966

申请日：2010-03-18

申请人： Yun-Seok LEE ,  Young-Je Cho ,  Byung-Hyun Kim

发明人： Yun-Seok LEE ,  Young-Je Cho ,  Byung-Hyun Kim

IPC分类号： G02F1/1335 ,  G02F1/13

CPC分类号： G02B5/201 ,  G02B5/223 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/133388

摘要： A base substrate of a color filter substrate includes a display region and a peripheral region. The display region includes a pixel area having a first unit area, a second unit area, and a third unit area that are disposed adjacent to each other, and a blocking area that surrounds peripheral portions of each of the first, second, and third unit areas. A first color filter is formed in the first unit area. A second color filter is formed in the second unit area and the blocking area. A third color filter is formed in the third unit area and on the second color filter in the blocking area. Therefore, the second and third color filters overlap each other so that light is blocked.

摘要翻译： 滤色器基板的基底基板包括显示区域和周边区域。 显示区域包括具有彼此相邻设置的第一单位区域，第二单位区域和第三单位区域的像素区域，以及围绕第一，第二和第三单元的周边部分的阻挡区域 地区 在第一单位区域中形成第一滤色器。 在第二单元区域和阻挡区域中形成第二滤色器。 在第三单元区域和第二滤色器中形成第三滤色器。 因此，第二和第三滤色器彼此重叠，使得光被阻挡。

公开(公告)号：US07751019B2

公开(公告)日：2010-07-06

申请号：US11515125

申请日：2006-09-01

申请人： Young-Je Cho ,  Yun-Seok Lee

发明人： Young-Je Cho ,  Yun-Seok Lee

IPC分类号： G02F1/1339

CPC分类号： G02F1/13394 ,  G02F2001/13398

摘要： A display panel includes a first substrate, a second substrate arranged opposite to the first substrate, and a column spacer formed on at least one of the first substrate or the second substrate to maintain a space between the first and second substrates, wherein the column spacer has a bottom side having a shape of a concave-sided polygon.

摘要翻译： 显示面板包括第一基板，与第一基板相对布置的第二基板和形成在第一基板或第二基板中的至少一个上的柱间隔件，以保持第一和第二基板之间的间隔，其中柱间隔件 具有底侧具有凹面多边形的形状。

公开(公告)号：US08004635B2

公开(公告)日：2011-08-23

申请号：US12726966

申请日：2010-03-18

申请人： Yun-Seok Lee ,  Young-Je Cho ,  Byung-Hyun Kim

发明人： Yun-Seok Lee ,  Young-Je Cho ,  Byung-Hyun Kim

IPC分类号： G02F1/1335 ,  G02F1/1333

CPC分类号： G02B5/201 ,  G02B5/223 ,  G02F1/133512 ,  G02F1/133514 ,  G02F2001/133388

摘要： A base substrate of a color filter substrate includes a display region and a peripheral region. The display region includes a pixel area having a first unit area, a second unit area, and a third unit area that are disposed adjacent to each other, and a blocking area that surrounds peripheral portions of each of the first, second, and third unit areas. A first color filter is formed in the first unit area. A second color filter is formed in the second unit area and the blocking area. A third color filter is formed in the third unit area and on the second color filter in the blocking area. Therefore, the second and third color filters overlap each other so that light is blocked.

摘要翻译： 滤色器基板的基底基板包括显示区域和周边区域。 显示区域包括具有彼此相邻设置的第一单位区域，第二单位区域和第三单位区域的像素区域，以及围绕第一，第二和第三单元的周边部分的阻挡区域 地区 在第一单位区域中形成第一滤色器。 在第二单元区域和阻挡区域中形成第二滤色器。 在第三单元区域和第二滤色器中形成第三滤色器。 因此，第二和第三滤色器彼此重叠，使得光被阻挡。

公开(公告)号：US08994888B2

公开(公告)日：2015-03-31

申请号：US12403695

申请日：2009-03-13

申请人： Yun-Seok Lee ,  Young-Je Cho ,  Cheon-Jae Maeng

发明人： Yun-Seok Lee ,  Young-Je Cho ,  Cheon-Jae Maeng

IPC分类号： G02F1/136 ,  H01L27/12

CPC分类号： H01L27/12 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1288

摘要： A display apparatus including a first substrate including a pixel area; a gate line disposed on the first substrate; a data line disposed on the first substrate and insulated from the gate line; an insulating layer pattern interposed between the gate line and the data line in an area where the gate line and the data line overlap; a gate insulating layer interposed between the gate line and the data line; a pixel electrode disposed in the pixel area; and a second substrate facing the first substrate.

摘要翻译： 一种显示装置，包括：包括像素区域的第一基板; 设置在所述第一基板上的栅极线; 数据线，设置在所述第一基板上并与所述栅极线绝缘; 在栅极线和数据线重叠的区域中插入在栅极线与数据线之间的绝缘层图案; 插入在栅极线和数据线之间的栅极绝缘层; 设置在像素区域中的像素电极; 以及面向第一基板的第二基板。

公开(公告)号：US08329486B2

公开(公告)日：2012-12-11

申请号：US12472979

申请日：2009-05-27

申请人： Yun-Seok Lee ,  Young-Je Cho ,  Sung-Hoon Kim

发明人： Yun-Seok Lee ,  Young-Je Cho ,  Sung-Hoon Kim

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  G02F1/133707 ,  G02F1/134336 ,  G02F2001/134345 ,  G02F2001/136222 ,  G02F2001/136236 ,  H01L27/1214 ,  H01L27/1248

摘要： The present disclosure relates to a thin film transistor array panel and a manufacturing method thereof. The method comprises: forming a thin film transistor on a substrate; forming a color filter adjacent to the thin film transistor and over the same substrate; depositing a first passivation layer on the color filter; coating a photosensitive film on the first passivation layer and exposing the photosensitive film to light using a first photomask to form a first photosensitive film pattern that comprises a first portion and a second portion that is thicker than the first portion, the first photosensitive film pattern exposing the first passivation layer around a circumference of the second portion; removing the exposed first passivation layer using the first photosensitive film pattern as an etch mask; blanket etching a whole surface of the first photosensitive film pattern until the first portion is removed to form a second photosensitive film pattern; depositing a conductive layer on the second photosensitive film pattern; and removing the second photosensitive film pattern to thereby selectively lift off portions of the conductive layer where a left behind portion forms a pixel electrode.

摘要翻译： 本公开涉及一种薄膜晶体管阵列面板及其制造方法。 该方法包括：在衬底上形成薄膜晶体管; 形成与所述薄膜晶体管相邻并且在相同基板上的滤色器; 在滤色器上沉积第一钝化层; 在第一钝化层上涂覆感光膜，并使用第一光掩模将感光膜曝光，以形成第一感光膜图案，其包括比第一部分厚的第一部分和第二部分，第一感光膜图案曝光 所述第一钝化层围绕所述第二部分的圆周; 使用第一感光膜图案去除暴露的第一钝化层作为蚀刻掩模; 毯式地蚀刻第一感光膜图案的整个表面，直到第一部分被去除以形成第二感光膜图案; 在第二感光膜图案上沉积导电层; 并且去除第二感光膜图案，从而选择性地剥离左后部分形成像素电极的导电层的部分。

公开(公告)号：US08203662B2

公开(公告)日：2012-06-19

申请号：US12571345

申请日：2009-09-30

申请人： Hoon Kang ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

发明人： Hoon Kang ,  Yun-Seok Lee ,  Jae-Sung Kim ,  Yang-Ho Jung ,  Young-Je Cho ,  Cheon-Jae Maeng ,  Woo-Geun Lee

IPC分类号： G02F1/136 ,  H01L29/04 ,  H01L29/10 ,  H01L31/00 ,  H01L27/14 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L29/78642 ,  H01L27/12 ,  H01L29/42384

摘要： Provided is a thin-film transistor (TFT) substrate. The TFT substrate includes: an insulating substrate; a semiconductor pattern which is formed on the insulating substrate, the semiconductor pattern having a top surface and a bottom surface; a source electrode and a drain electrode which are disposed on the top and bottom surfaces of the semiconductor pattern, respectively; a gate electrode which is disposed alongside the semiconductor pattern with a gate insulating film interposed therebetween; a data line which is connected to the source electrode and extends in a first direction; a gate line which is connected to the gate electrode and extends in a second direction; and a pixel electrode which is connected to the drain electrode and is formed in a pixel region.

摘要翻译： 提供了薄膜晶体管（TFT）基板。 TFT基板包括：绝缘基板; 形成在所述绝缘基板上的半导体图案，所述半导体图案具有顶面和底面; 源电极和漏电极，分别设置在半导体图案的顶表面和底表面上; 栅极电极，其间设置有栅极绝缘膜并且位于半导体图案的旁边; 数据线，其连接到所述源电极并沿第一方向延伸; 栅极线，其连接到所述栅电极并沿第二方向延伸; 以及连接到漏电极并形成在像素区域中的像素电极。

公开(公告)号：US20100231819A1

公开(公告)日：2010-09-16

申请号：US12577693

申请日：2009-10-12

申请人： Yun-Seok LEE ,  Young-Je Cho

发明人： Yun-Seok LEE ,  Young-Je Cho

IPC分类号： G02F1/1368

CPC分类号： G02F1/1343 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/134354 ,  G02F2201/40

摘要： Embodiments of the present invention relate to a liquid crystal display. According to an embodiment, a liquid crystal display including a plurality of pixels arranged in a matrix according to an exemplary embodiment of the present invention includes: a plurality of pixel electrodes respectively including a first sub-pixel electrode and a second sub-pixel electrode; a plurality of first thin film transistors connected to the first sub-pixel electrodes; a plurality of second thin film transistors connected to the second sub-pixel electrodes; a plurality of third thin film transistors connected to the second sub-pixel electrodes; a plurality of first gate lines connected to the first and second thin film transistors; a plurality of data lines connected to the first and second thin film transistors; a plurality of second gate lines connected to the third thin film transistors; and a step-down capacitor connected between the drain electrode of the third thin film transistor and the first gate line.

摘要翻译： 本发明的实施例涉及一种液晶显示器。 根据一个实施例，根据本发明的示例性实施例的包括排列成矩阵的多个像素的液晶显示器包括：分别包括第一子像素电极和第二子像素电极的多个像素电极; 连接到第一子像素电极的多个第一薄膜晶体管; 连接到第二子像素电极的多个第二薄膜晶体管; 连接到第二子像素电极的多个第三薄膜晶体管; 连接到第一和第二薄膜晶体管的多个第一栅极线; 连接到第一和第二薄膜晶体管的多条数据线; 连接到第三薄膜晶体管的多个第二栅极线; 以及连接在第三薄膜晶体管的漏电极和第一栅极线之间的降压电容器。

公开(公告)号：US08654271B2

公开(公告)日：2014-02-18

申请号：US12577693

申请日：2009-10-12

申请人： Yun-Seok Lee ,  Young-Je Cho

发明人： Yun-Seok Lee ,  Young-Je Cho

IPC分类号： G02F1/361 ,  G02F1/1343

CPC分类号： G02F1/1343 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/134354 ,  G02F2201/40

摘要： Embodiments of the present invention relate to a liquid crystal display. According to an embodiment, a liquid crystal display including a plurality of pixels arranged in a matrix according to an exemplary embodiment of the present invention includes: a plurality of pixel electrodes respectively including a first sub-pixel electrode and a second sub-pixel electrode; a plurality of first thin film transistors connected to the first sub-pixel electrodes; a plurality of second thin film transistors connected to the second sub-pixel electrodes; a plurality of third thin film transistors connected to the second sub-pixel electrodes; a plurality of first gate lines connected to the first and second thin film transistors; a plurality of data lines connected to the first and second thin film transistors; a plurality of second gate lines connected to the third thin film transistors; and a step-down capacitor connected between the drain electrode of the third thin film transistor and the first gate line.

摘要翻译： 本发明的实施例涉及一种液晶显示器。 根据一个实施例，根据本发明的示例性实施例的包括排列成矩阵的多个像素的液晶显示器包括：分别包括第一子像素电极和第二子像素电极的多个像素电极; 连接到第一子像素电极的多个第一薄膜晶体管; 连接到第二子像素电极的多个第二薄膜晶体管; 连接到第二子像素电极的多个第三薄膜晶体管; 连接到第一和第二薄膜晶体管的多个第一栅极线; 连接到第一和第二薄膜晶体管的多条数据线; 连接到第三薄膜晶体管的多个第二栅极线; 以及连接在第三薄膜晶体管的漏电极和第一栅极线之间的降压电容器。