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公开(公告)号：US5442196A
公开(公告)日：1995-08-15
申请号：US201410
申请日：1994-02-24
申请人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
发明人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
CPC分类号： H01L39/228 , H01L21/82
摘要： A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
摘要翻译： 一对超导电极形成为在其间插入半导体，并且通过绝缘膜在半导体上形成控制电极，以便控制超导电极之间的半导体中的超导弱耦合状态。 超导电极之间的距离由插入在两个电极之间的超导体的厚度决定，从而以高精度稳定电极间距离，以提高器件特性的均匀性。 并且在半导体层上形成两个超导电极并且在这两个电极之间的超导弱耦合状态由第三电极控制的布置中，通过在半导体层中提供不同的杂质分布来增加增益。
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公开(公告)号：US5126801A
公开(公告)日：1992-06-30
申请号：US412201
申请日：1989-09-25
申请人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
发明人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
CPC分类号： H01L39/228 , H01L21/82
摘要： A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic. In an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is incredible by furnishing a varied impurity distribution in the semiconductor layer.
摘要翻译： 一对超导电极形成为在其间插入半导体，并且通过绝缘膜在半导体上形成控制电极，以便控制超导电极之间的半导体中的超导弱耦合状态。 超导电极之间的距离由插入在两个电极之间的超导体的厚度决定，从而以高精度稳定电极间距离，以提高器件特性的均匀性。 在半导体层上形成两个超导电极并且在这两个电极之间的超导弱耦合状态由第三电极控制的布置中，通过在半导体层中提供不同的杂质分布，增益是令人难以置信的。
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公开(公告)号：US5311037A
公开(公告)日：1994-05-10
申请号：US925122
申请日：1992-08-06
CPC分类号： H01L39/228
摘要： Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current flows between the superconducting electrode across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
摘要翻译： 在用作沟道的半导体上形成超导电极。 控制电极通过与形成有超导电极的半导体侧相反的半导体侧的绝缘膜或p-n结配置。 跨过半导体的超导电极之间的超导电流由施加到控制电极的电信号控制，从而增强电流增益。
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公开(公告)号：US4888629A
公开(公告)日：1989-12-19
申请号：US201332
申请日：1988-05-31
IPC分类号： H01L39/22
CPC分类号： H01L39/228
摘要： Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current which flows between the superconducting electrodes across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
摘要翻译： 在用作沟道的半导体上形成超导电极。 控制电极通过与形成有超导电极的半导体侧相反的半导体侧的绝缘膜或p-n结配置。 在跨越半导体的超导电极之间流动的超导电流由施加到控制电极的电信号控制，从而增强电流增益。
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公开(公告)号：US5160983A
公开(公告)日：1992-11-03
申请号：US439809
申请日：1989-11-21
IPC分类号： H01L39/22
CPC分类号： H01L39/228
摘要： Superconducting electrodes are formed on a semiconductor which serves as a channel. A control electrode is disposed through an insulator film or a p-n junction on the side of the semiconductor which is opposite to the semiconductor side on which the superconducting electrode is formed. A superconducting current which flows between the superconducting electrodes across the semiconductor is controlled by an electric signal which is applied to the control electrode, thereby enhancing the current gain.
摘要翻译： 在用作沟道的半导体上形成超导电极。 控制电极通过与形成有超导电极的半导体侧相反的半导体侧的绝缘膜或p-n结配置。 在跨越半导体的超导电极之间流动的超导电流由施加到控制电极的电信号控制，从而增强电流增益。
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公开(公告)号：US4884111A
公开(公告)日：1989-11-28
申请号：US073408
申请日：1987-07-13
申请人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
发明人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
CPC分类号： H01L39/228 , H01L21/82
摘要： A pair of superconducting electrodes are so formed as to interpose a smeiconductor therebetween, and a control electrode is formed on the seimiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
摘要翻译： 一对超导电极形成为在其间插入半导体，并且通过绝缘膜在半导体上形成控制电极，以便控制超导电极之间的半导体中的超导弱耦合状态。 超导电极之间的距离由插入在两个电极之间的超导体的厚度决定，从而以高精度稳定电极间距离，以提高器件特性的均匀性。 并且在半导体层上形成两个超导电极并且在这两个电极之间的超导弱耦合状态由第三电极控制的布置中，通过在半导体层中提供不同的杂质分布来增加增益。
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公开(公告)号：US5311036A
公开(公告)日：1994-05-10
申请号：US875431
申请日：1992-04-29
申请人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
发明人： Toshikazu Nishino , Mutsuko Miyake , Ushio Kawabe , Yutaka Harada , Masaaki Aoki , Mikio Hirano
CPC分类号： H01L39/228 , H01L21/82
摘要： A pair of superconducting electrodes are so formed as to interpose a semiconductor therebetween, and a control electrode is formed on the semiconductor through an insulator film so as to control the superconductive weak coupling state in the semiconductor between the superconducting electrodes. The distance between the superconducting electrodes is determined by the thickness of the superconductor interposed between the two electrodes, whereby the interelectrode distance is settled with a high precision to improve the uniformity of the device characteristic.And in an arrangement where two superconducting electrodes are formed on a semiconductor layer and the superconductive weak coupling state between such two electrodes is controlled by a third electrode, the gain is increadable by furnishing a varied impurity distribution in the semiconductor layer.
摘要翻译： 一对超导电极形成为在其间插入半导体，并且通过绝缘膜在半导体上形成控制电极，以便控制超导电极之间的半导体中的超导弱耦合状态。 超导电极之间的距离由插入在两个电极之间的超导体的厚度决定，从而以高精度稳定电极间距离，以提高器件特性的均匀性。 并且在半导体层上形成两个超导电极并且在这两个电极之间的超导弱耦合状态由第三电极控制的布置中，通过在半导体层中提供不同的杂质分布来增加增益。
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8.发明授权Superconducting read-only memories or programable logic arrays having the same 失效超导只读存储器或具有相同的可编程逻辑阵列
公开(公告)号：US4633439A
公开(公告)日：1986-12-30
申请号：US515514
申请日：1983-07-20
申请人： Yutaka Harada , Toshikazu Nishino
发明人： Yutaka Harada , Toshikazu Nishino
IPC分类号： G11C11/44 , H01L27/18 , H03K3/38 , H03K19/195 , G11C17/02
CPC分类号： H01L27/18 , G11C11/44 , H03K19/1952 , H03K3/38 , Y10S505/832
摘要： An A.C. powered type logic array of very high speed operations which employs Josephson devices and which can program any desired logic. The logic array comprises a first logic array which delivers AND logic signals of desired ones of input signals, and a second logic array which delivers OR logic signals of desired ones of the AND outputs. Each of the first and second logic arrays comprises a plurality of bit lines which connect a plurality of arrayed Josephson devices in series at respective rows and each of which has one end connected to a power source and the other end grounded through a resistor, and word lines which are arranged in the column direction of the Josephson device array and which are selectively coupled to the Josephson devices. Whether or not the word lines are coupled to the respective Josephson devices of the arrays, is determined by the patterns of the word lines or the patterns of the Josephson devices, thereby to program the desired logic.
摘要翻译： 一种采用约瑟夫逊器件并可编程任何所需逻辑的非常高速度运算的交流电源型逻辑阵列。 该逻辑阵列包括传送所需输入信号的AND逻辑信号的第一逻辑阵列，以及传送所述AND输出的OR逻辑信号的第二逻辑阵列。 第一和第二逻辑阵列中的每一个包括多个位线，这些位线将多个排列的约瑟夫逊器件串联连接在各自的行上，并且每个位线的一端连接到电源，另一端通过电阻器接地，并且字 这些线被布置在约瑟夫逊器件阵列的列方向上，并且选择性地耦合到约瑟夫逊器件。 字线是否耦合到阵列的各自的约瑟夫逊器件，由字线的图案或约瑟夫逊器件的图案确定，从而编程期望的逻辑。
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公开(公告)号：US08137788B2
公开(公告)日：2012-03-20
申请号：US11663948
申请日：2005-09-26
CPC分类号： C08J7/047 , C08J2367/02 , C08J2433/00 , Y10T428/24355 , Y10T428/25 , Y10T428/26 , Y10T428/265 , Y10T428/269 , Y10T428/28 , Y10T428/31504 , Y10T428/31551 , Y10T428/31565 , Y10T428/31786 , Y10T428/31797 , Y10T428/31855 , Y10T428/31935
摘要： A laminated film including a thermoplastic resin film and an laminated layer that is formed on at least one side of the thermoplastic resin film and comprises (A) a composition, (B) an epoxy crosslinking agent and (C) an acrylic resin having an alkyl chain of 18 to 25 carbon atoms is characterized in that the composition (A) is a composition containing at least a polythiophene and a polyanion and/or a composition containing a polythiophene derivative and a polyanion, the laminated layer contains 15 to 100 parts by weight of the acrylic resin (C) having an alkyl chain of 18 to 25 carbon atoms based on 100 parts by weight of the sum of the composition (A) and the crosslinking agent (B) and/or its reaction product, at least one side of the laminated film has a three-dimensional average surface roughness (SRa) of 3 to 50 nm, and the laminated film contains less than 10 internal contaminant particles with an average particle size of at least 100 μm per 1 m2, so that it has high level of electrical conductivity, good releasability and water resistance, and also has oligomer precipitation-preventing properties during heating.
摘要翻译： 一种层压膜，包括热塑性树脂膜和层压层，所述层压层形成在所述热塑性树脂膜的至少一侧上，并且包含（A）组合物，（B）环氧交联剂和（C）具有烷基 18至25个碳原子的链的特征在于，组合物（A）是至少含有聚噻吩和聚阴离子的组合物和/或含有聚噻吩衍生物和聚阴离子的组合物，层叠层含有15〜100重量份 的丙烯酸树脂（C），基于100重量份的组合物（A）和交联剂（B）和/或其反应产物的总和，具有18至25个碳原子的烷基链的丙烯酸树脂（C）和/或其反应产物，至少一个侧面 层叠膜的三维平均表面粗糙度（SRa）为3〜50nm，层叠膜含有少于10个平均粒径为1m 2以上的平均粒径为100μm以上的内部污染物粒子， 高水平的el 导电性，良好的脱模性和耐水性，并且在加热时也具有低聚物防止沉淀的性质。
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公开(公告)号：US07950292B2
公开(公告)日：2011-05-31
申请号：US12447690
申请日：2007-08-03
申请人： Yutaka Harada , Ichiro Mitsutake , Kouji Okuda , Taka Inoue , Tetsuya Kajita
发明人： Yutaka Harada , Ichiro Mitsutake , Kouji Okuda , Taka Inoue , Tetsuya Kajita
摘要： In a constant current circuit, a constant current is caused to flow through a resistor, thereby causing a constant voltage to occur across the resistor. This constant voltage is then superimposed on an output signal of an operational amplifier that is to be fed back to the drain of a field effect transistor, thereby maintaining the same potential in an AC manner between the output terminal of the operational amplifier and the drain of the field effect transistor. In this way, the gate and drain of the field effect transistor is caused to exhibit the same potential in an AC manner, so that no current will occur through the stray capacitance between the gate and drain of the field effect transistor. As a result, similarly to a case of using a feedback capacitor, the input impedance of the field effect transistor can be raised.
摘要翻译： 在恒流电路中，使恒定电流流过电阻器，从而在电阻器两端产生恒定的电压。 然后将该恒定电压叠加在要反馈到场效应晶体管的漏极的运算放大器的输出信号上，从而在运算放大器的输出端和漏极之间以AC方式保持相同的电位 场效应晶体管。 以这种方式，使场效应晶体管的栅极和漏极以交流方式呈现相同的电位，使得不会通过场效应晶体管的栅极和漏极之间的杂散电容发生电流。 结果，与使用反馈电容器的情况类似，可以提高场效应晶体管的输入阻抗。
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