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    Semiconductor device
    8.
    发明申请
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US20080017996A1

    公开(公告)日：2008-01-24

    申请号：US11826709

    申请日：2007-07-18

    申请人： Mitsuru Sato ,  Masaru Kito ,  Yuzo Nagata

    发明人： Mitsuru Sato ,  Masaru Kito ,  Yuzo Nagata

    IPC分类号： H01L23/482

    CPC分类号： H01L21/76838 ,  H01L21/0337 ,  H01L21/32139 ,  H01L27/0203 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11565 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device comprises a wiring layer. The wiring layer is provided by forming a sidewall film having a closed-loop along a sidewall of a hard mask, etching off the hard mask to leave the sidewall film, and then etching a target material to be etched with a mask of the sidewall film. The wiring layer includes a folded wiring section formed along an end of the hard mask, and a parallel section composed of two parallel wires continued from the folded wiring section. The wiring layer has a closed-loop cut made in a portion except for the folded wiring section and the parallel section. The folded wiring section and the parallel section are used as a contact region for connection to another wire.

    摘要翻译： 半导体器件包括布线层。 布线层通过沿着硬掩模的侧壁形成具有闭环的侧壁膜，蚀刻出硬掩模以离开侧壁膜，然后用侧壁膜的掩模蚀刻待蚀刻的目标材料来提供 。 布线层包括沿着硬掩模的端部形成的折叠布线部分和由折叠的布线部分连续的两条平行的线构成的平行部分。 布线层具有除了折叠布线部分和平行部分之外的部分中的闭环切割。 折叠的布线部分和平行部分用作用于连接到另一导线的接触区域。

    Semiconductor device
    9.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US07838996B2

    公开(公告)日：2010-11-23

    申请号：US11826709

    申请日：2007-07-18

    申请人： Mitsuru Sato ,  Masaru Kito ,  Yuzo Nagata

    发明人： Mitsuru Sato ,  Masaru Kito ,  Yuzo Nagata

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L21/76838 ,  H01L21/0337 ,  H01L21/32139 ,  H01L27/0203 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11565 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A semiconductor device comprises a wiring layer. The wiring layer is provided by forming a sidewall film having a closed-loop along a sidewall of a hard mask, etching off the hard mask to leave the sidewall film, and then etching a target material to be etched with a mask of the sidewall film. The wiring layer includes a folded wiring section formed along an end of the hard mask, and a parallel section composed of two parallel wires continued from the folded wiring section. The wiring layer has a closed-loop cut made in a portion except for the folded wiring section and the parallel section. The folded wiring section and the parallel section are used as a contact region for connection to another wire.

    摘要翻译： 半导体器件包括布线层。 布线层通过沿着硬掩模的侧壁形成具有闭环的侧壁膜，蚀刻出硬掩模以离开侧壁膜，然后用侧壁膜的掩模蚀刻待蚀刻的目标材料来提供 。 布线层包括沿着硬掩模的端部形成的折叠布线部分和由折叠的布线部分连续的两条平行的线构成的平行部分。 布线层具有除了折叠布线部分和平行部分之外的部分中的闭环切割。 折叠的布线部分和平行部分用作用于连接到另一导线的接触区域。