公开(公告)号：US07191428B2

公开(公告)日：2007-03-13

申请号：US11142789

申请日：2005-05-31

申请人： ZongWu Tang ,  Juhwan Kim ,  Daniel Zhang ,  Haiqing Wei ,  Gang Huang

发明人： ZongWu Tang ,  Juhwan Kim ,  Daniel Zhang ,  Haiqing Wei ,  Gang Huang

IPC分类号： G06F17/50

CPC分类号： G03F1/36

摘要： A method for performing layout verification involves identifying feature centerlines in a mask layout, and then performing lithography simulation along the centerlines to generate a set of intensity distributions. At each local maxima or minima in the intensity distributions, further lithography simulation can be performed to determine an exposure pattern width at those local maxima/minima (check positions). The exposure pattern widths can then be evaluated to determine whether an actual pinch or bridge defect will be generated at those locations. If defect generation is likely (based on the lithographical simulation) at a particular location, the corresponding portion of the mask layout can be redesigned to avoid defect generation during actual production. In this method, accurate layout verification can be performed with a minimum of time-consuming lithography modeling.

摘要翻译： 用于执行布局验证的方法涉及识别掩模布局中的特征中心线，然后沿着中心线执行光刻模拟以生成一组强度分布。 在强度分布的每个局部最大值或最小值处，可以进行进一步的光刻模拟，以确定那些局部最大值/最小值（检查位置）处的曝光图案宽度。 然后可以评估曝光图案宽度，以确定在这些位置是否将产生实际的夹点或桥接缺陷。 如果在特定位置可能存在缺陷产生（基于光刻模拟），则可以重新设计掩模布局的相应部分，以避免在实际生产期间产生缺陷。 在这种方法中，可以用最少的耗时的光刻建模来执行精确的布局验证。

公开(公告)号：US20060271906A1

公开(公告)日：2006-11-30

申请号：US11142789

申请日：2005-05-31

申请人： ZongWu Tang ,  Juhwan Kim ,  Daniel Zhang ,  Haiqing Wei ,  Gang Huang

发明人： ZongWu Tang ,  Juhwan Kim ,  Daniel Zhang ,  Haiqing Wei ,  Gang Huang

IPC分类号： G06F17/50 ,  G03F1/00

CPC分类号： G03F1/36

摘要： A method for performing layout verification involves identifying feature centerlines in a mask layout, and then performing lithography simulation along the centerlines to generate a set of intensity distributions. At each local maxima or minima in the intensity distributions, further lithography simulation can be performed to determine an exposure pattern width at those local maxima/minima (check positions). The exposure pattern widths can then be evaluated to determine whether an actual pinch or bridge defect will be generated at those locations. If defect generation is likely (based on the lithographical simulation) at a particular location, the corresponding portion of the mask layout can be redesigned to avoid defect generation during actual production. In this method, accurate layout verification can be performed with a minimum of time-consuming lithography modeling.

摘要翻译： 用于执行布局验证的方法涉及识别掩模布局中的特征中心线，然后沿着中心线执行光刻模拟以生成一组强度分布。 在强度分布的每个局部最大值或最小值处，可以进行进一步的光刻模拟，以确定那些局部最大值/最小值（检查位置）处的曝光图案宽度。 然后可以评估曝光图案宽度，以确定在这些位置是否将产生实际的夹点或桥接缺陷。 如果在特定位置可能存在缺陷产生（基于光刻模拟），则可以重新设计掩模布局的相应部分，以避免在实际生产期间产生缺陷。 在这种方法中，可以用最少的耗时的光刻建模来执行精确的布局验证。

公开(公告)号：US20100014199A1

公开(公告)日：2010-01-21

申请号：US12176801

申请日：2008-07-21

申请人： Jamil Kawa ,  Subarnarekha Sinha ,  Min-Chun Tsai ,  ZongWu Tang ,  Qing Su

发明人： Jamil Kawa ,  Subarnarekha Sinha ,  Min-Chun Tsai ,  ZongWu Tang ,  Qing Su

IPC分类号： H02H9/04 ,  G06F17/50

CPC分类号： H01L27/0251 ,  H01H59/0009

摘要： Embodiments of an interface circuit are described. This interface circuit includes an input pad, a control node and a transistor, which has three terminals. A first terminal is electrically coupled to the input pad and a second terminal is electrically coupled to the control node. Moreover, the interface circuit includes a micro-electromechanical system (MEMS) switch, which is electrically coupled to the input pad and the control node, where the MEMS switch is in parallel with the transistor. In the absence of a voltage applied to a control terminal of the MEMS switch, the MEMS switch is closed, thereby electrically coupling the input pad and the control node. Furthermore, when the voltage is applied to the control terminal of the MEMS switch, the MEMS switch is open, thereby electrically decoupling the input pad and the control node.

摘要翻译： 描述接口电路的实施例。 该接口电路包括具有三个端子的输入焊盘，控制节点和晶体管。 第一端子电耦合到输入焊盘，并且第二端子电耦合到控制节点。 此外，接口电路包括微机电系统（MEMS）开关，其电耦合到输入焊盘和控制节点，其中MEMS开关与晶体管并联。 在没有施加到MEMS开关的控制端子的电压的情况下，MEMS开关闭合，从而电耦合输入焊盘和控制节点。 此外，当将电压施加到MEMS开关的控制端子时，MEMS开关断开，由此使输入焊盘和控制节点电耦合。

公开(公告)号：US07636904B2

公开(公告)日：2009-12-22

申请号：US11584356

申请日：2006-10-20

申请人： Hua Song ,  Lantiang Wang ,  ZongWu Tang

发明人： Hua Song ,  Lantiang Wang ,  ZongWu Tang

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A computer is programmed to perform lithography simulation at a number of locations in a transverse direction relative to a length of a feature of an IC design, to obtain simulated intensities at the locations. The computer is further programmed to determine constants of a predetermined formula that models a trend of the simulated intensities as a function of distance (in the transverse direction), by curve-fitting. The computer is also programmed to compute a value (“CD predictor”) based on the just-determined constants, the formula and a known threshold intensity for a given position along the feature's length. The just-described process, of lithography-simulation, followed by curve-fitting, followed by CD predictor computation, is repeatedly performed to obtain a number of CD predictors at a corresponding number of positions along the feature's length. The CD predictors are used to identify a position of a critical dimension, for use in, for example, layout verification.

摘要翻译： 计算机被编程为在相对于IC设计的特征的长度的横向方向上的多个位置处执行光刻模拟，以在位置处获得模拟的强度。 计算机还被编程为通过曲线拟合来确定模拟强度的趋势作为距离（在横向方向上）的函数的预定公式的常数。 计算机还被编程为基于刚刚确定的常数，公式和沿特征长度的给定位置的已知阈值强度来计算值（“CD预测器”）。 重复执行刚才描述的光刻仿真过程，随后进行曲线拟合，随后进行CD预测器计算，以在沿着特征长度的相应位置的数量处获得多个CD预测器。 CD预测器用于识别临界尺寸的位置，用于例如布局验证。

公开(公告)号：US07679872B2

公开(公告)日：2010-03-16

申请号：US12176801

申请日：2008-07-21

申请人： Jamil Kawa ,  Subarnarekha Sinha ,  Min-Chun Tsai ,  ZongWu Tang ,  Qing Su

发明人： Jamil Kawa ,  Subarnarekha Sinha ,  Min-Chun Tsai ,  ZongWu Tang ,  Qing Su

IPC分类号： H02H9/04 ,  H02H9/00

CPC分类号： H01L27/0251 ,  H01H59/0009

摘要： Embodiments of an interface circuit are described. This interface circuit includes an input pad, a control node and a transistor, which has three terminals. A first terminal is electrically coupled to the input pad and a second terminal is electrically coupled to the control node. Moreover, the interface circuit includes a micro-electromechanical system (MEMS) switch, which is electrically coupled to the input pad and the control node, where the MEMS switch is in parallel with the transistor. In the absence of a voltage applied to a control terminal of the MEMS switch, the MEMS switch is closed, thereby electrically coupling the input pad and the control node. Furthermore, when the voltage is applied to the control terminal of the MEMS switch, the MEMS switch is open, thereby electrically decoupling the input pad and the control node.

摘要翻译： 描述接口电路的实施例。 该接口电路包括具有三个端子的输入焊盘，控制节点和晶体管。 第一端子电耦合到输入焊盘，第二端子电耦合到控制节点。 此外，接口电路包括微机电系统（MEMS）开关，其电耦合到输入焊盘和控制节点，其中MEMS开关与晶体管并联。 在没有施加到MEMS开关的控制端子的电压的情况下，MEMS开关闭合，从而电耦合输入焊盘和控制节点。 此外，当将电压施加到MEMS开关的控制端子时，MEMS开关断开，由此使输入焊盘和控制节点电耦合。

公开(公告)号：US20080109766A1

公开(公告)日：2008-05-08

申请号：US11584356

申请日：2006-10-20

申请人： Hua Song ,  Lantiang Wang ,  ZongWu Tang

发明人： Hua Song ,  Lantiang Wang ,  ZongWu Tang

IPC分类号： G06F17/50

CPC分类号： G06F17/5081

摘要： A computer is programmed to perform lithography simulation at a number of locations in a transverse direction relative to a length of a feature of an IC design, to obtain simulated intensities at the locations. The computer is further programmed to determine constants of a predetermined formula that models a trend of the simulated intensities as a function of distance (in the transverse direction), by curve-fitting. The computer is also programmed to compute a value (“CD predictor”) based on the just-determined constants, the formula and a known threshold intensity for a given position along the feature's length. The just-described process, of lithography-simulation, followed by curve-fitting, followed by CD predictor computation, is repeatedly performed to obtain a number of CD predictors at a corresponding number of positions along the feature's length. The CD predictors are used to identify a position of a critical dimension, for use in, for example, layout verification.

摘要翻译： 计算机被编程为在相对于IC设计的特征的长度的横向方向上的多个位置处执行光刻模拟，以在位置处获得模拟的强度。 计算机还被编程为通过曲线拟合来确定模拟强度的趋势作为距离（在横向方向上）的函数的预定公式的常数。 计算机还被编程为基于刚刚确定的常数，公式和沿特征长度的给定位置的已知阈值强度来计算值（“CD预测器”）。 重复执行刚才描述的光刻仿真过程，随后进行曲线拟合，随后进行CD预测器计算，以在沿着特征长度的相应位置的数量处获得多个CD预测器。 CD预测器用于识别临界尺寸的位置，用于例如布局验证。