PHASE LOCKED LOOP
    1.
    发明申请
    PHASE LOCKED LOOP 有权
    相位锁定环

    公开(公告)号:US20120313677A1

    公开(公告)日:2012-12-13

    申请号:US13510578

    申请日:2010-09-17

    申请人: Neil Edwin Thomas

    发明人: Neil Edwin Thomas

    IPC分类号: H03L7/06

    摘要: A phase locked loop (10) comprising: a tuneable oscillator (12); a mixer-based phase sensitive detector (18) to receive input signals from the tuneable oscillator (12) and a reference signal (20); a cycle slip detector (26) to receive input signals from the tuneable oscillator (12) and the reference signal (20), the cycle slip detector (26) being configured to generate an output signal when two consecutive pulses are present in one of its input signals without an intervening pulse in the other of its input signals; coarse tune signal means (32, 34) to receive the output signal generated by the cycle slip detector; and adding means (24) for adding a signal output by the coarse signal means (32, 34) to a signal output by the phase sensitive detector (18) to control the frequency of the tuneable oscillator (12).

    摘要翻译: 一种锁相环(10),包括:可调谐振荡器(12); 基于混频器的相位敏感检测器(18),用于接收来自可调谐振荡器(12)的输入信号和参考信号(20); 循环滑移检测器(26),用于接收来自可调谐振荡器(12)和参考信号(20)的输入信号,周期滑移检测器(26)被配置为当两个连续脉冲存在于其中的一个中时产生输出信号 在其输入信号中没有中间脉冲的输入信号; 粗调信号装置(32,34),用于接收由循环滑移检测器产生的输出信号; 和加法装置(24),用于将由粗信号装置输出的信号(32,34)加到由相敏检测器(18)输出的信号上,以控制可调谐振荡器(12)的频率。

    Low noise synthesizer and method employing first tunable source and first and second reference sources
    2.
    发明授权
    Low noise synthesizer and method employing first tunable source and first and second reference sources 失效
    低噪声合成器和采用第一可调谐源和第一和第二参考源的方法

    公开(公告)号:US07005925B2

    公开(公告)日:2006-02-28

    申请号:US10498151

    申请日:2002-12-13

    IPC分类号: H03L7/00

    摘要: A low noise sinusoidal signal at a desired output frequency is synchronised using a first variable frequency oscillator (1) and providing a feedback control loop around the first oscillator (1) to generate a feedback control signal in successive frequ comparison steps using second and third frequency reference signals (44, 42). Each of the second and third frequency reference signals are derived from a first frequency reference signal, the second frequency reference signal (44) being compared with the output frequency of the first oscillator (1) to generate a frequency difference signal (43), and said frequency difference signal ( being compared in frequency with the third frequency reference signal (42) to generate said feedback control signal for the first oscillator (1), the frequency of the third frequency reference signal (42) being equal to the difference of the frequency of the se frequency reference signal (44) and the desired output frequency. The second and third frequency reference signals (44, 42) are generated by respective second and third frequency reference sources, the second frequency reference source comprising a second variable frequency oscillator (38) the frequency of which is maintained in a limited range around its optimum natural frequency to give optimum performance in producing a low noise output from the first oscillator (1).

    摘要翻译: 使用第一可变频率振荡器(1)使期望输出频率的低噪声正弦信号同步,并且在第一振荡器(1)周围提供反馈控制环路,以在使用第二和第三频率的连续频率比较步骤中产生反馈控制信号 参考信号(44,42)。 第二频率参考信号和第三频率参考信号中的每一个从第一频率参考信号导出,将第二频率参考信号(44)与第一振荡器(1)的输出频率进行比较以产生频率差信号(43),以及 所述频率差信号(频率与第三频率参考信号(42)进行比较)以产生用于第一振荡器(1)的反馈控制信号,第三频率参考信号(42)的频率等于 频率参考信号(44)的频率和期望的输出频率,第二和第三频率参考信号(44,42)由相应的第二和第三频率参考源产生,第二频率参考源包括第二可变频率振荡器 (38),其频率保持在围绕其最佳固有频率的有限范围内,以获得最佳性能 在产生来自第一振荡器(1)的低噪声输出。

    Waveform generation
    3.
    发明授权
    Waveform generation 失效
    波形生成

    公开(公告)号:US07702707B2

    公开(公告)日:2010-04-20

    申请号:US10548115

    申请日:2004-02-12

    IPC分类号: G06F1/02

    CPC分类号: G06F1/0328

    摘要: A waveform generator for generating a smooth version of an original waveform which contains abrupt transitions, includes a phase accumulator incremented at successive sampling times to produce an output representative of the phase of the original waveform, a phase scaler arranged to convert the residual contents of the accumulator following a transition from phase to time, computing means responsive to the time to calculate a number of samples along a smooth transition, each offset by that time from the sampling times, and a sequencer to replace the otherwise abrupt transition with the sequence of samples from the computed smooth transition.

    摘要翻译: 用于产生包含突变的原始波形的平滑版本的波形发生器包括在连续采样时间递增的相位累加器,以产生代表原始波形的相位的输出;相位定标器,被布置成将 累加器在相对于时间的转变之后,响应于时间来计算沿着平滑过渡的每个样本的时间的计算装置,每个样本从采样时间偏移到该时间,以及定序器以用样本序列代替另外的突变过渡 从计算的平滑过渡。

    APPARATUS AND METHOD FOR SETTING A PARAMETER VALUE
    4.
    发明申请
    APPARATUS AND METHOD FOR SETTING A PARAMETER VALUE 审中-公开
    用于设定参数值的装置和方法

    公开(公告)号:US20110310004A1

    公开(公告)日:2011-12-22

    申请号:US13131834

    申请日:2009-11-11

    申请人: Martin Trasler

    发明人: Martin Trasler

    IPC分类号: G09G5/00

    摘要: Embodiments of the present invention relate to an improved man-machine interface for an apparatus. The interface comprises at least one graphical representation of a controllable parameter.

    摘要翻译: 本发明的实施例涉及一种用于装置的改进的人机界面。 界面包括可控参数的至少一个图形表示。

    Method of and apparatus for testing for integrated circuit contact defects
    5.
    发明授权
    Method of and apparatus for testing for integrated circuit contact defects 有权
    用于集成电路接触缺陷的测试方法和设备

    公开(公告)号:US07385410B2

    公开(公告)日:2008-06-10

    申请号:US10533188

    申请日:2003-10-27

    IPC分类号: G01R31/02

    CPC分类号: G01R31/046 G01R27/205

    摘要: Various tester configurations are provided that injects test signals into nets (e.g. 24). Non-linear characteristics of the response are detected (e.g. harmonics, do offset) and used to assess the adequacy or otherwise of device connections in the net.

    摘要翻译: 提供了将测试信号注入网络的各种测试器配置(例如24)。 检测到响应的非线性特性(例如谐波,做偏移),并用于评估网络中设备连接的充分性。

    Phase locked loop
    6.
    发明授权
    Phase locked loop 有权
    锁相环

    公开(公告)号:US08552773B2

    公开(公告)日:2013-10-08

    申请号:US13510578

    申请日:2010-09-17

    申请人: Neil Edwin Thomas

    发明人: Neil Edwin Thomas

    IPC分类号: H03L7/06

    摘要: A phase locked loop (10) comprising: a tuneable oscillator (12); a mixer-based phase sensitive detector (18) to receive input signals from the tuneable oscillator (12) and a reference signal (20); a cycle slip detector (26) to receive input signals from the tuneable oscillator (12) and the reference signal (20), the cycle slip detector (26) being configured to generate an output signal when two consecutive pulses are present in one of its input signals without an intervening pulse in the other of its input signals; coarse tune signal means (32, 34) to receive the output signal generated by the cycle slip detector; and adding means (24) for adding a signal output by the coarse signal means (32, 34) to a signal output by the phase sensitive detector (18) to control the frequency of the tuneable oscillator (12).

    摘要翻译: 一种锁相环(10),包括:可调谐振荡器(12); 基于混频器的相位敏感检测器(18),用于接收来自可调谐振荡器(12)的输入信号和参考信号(20); 循环滑移检测器(26),用于接收来自可调谐振荡器(12)和参考信号(20)的输入信号,周期滑移检测器(26)被配置为当两个连续脉冲存在于其中的一个中时产生输出信号 在其输入信号中没有中间脉冲的输入信号; 粗调信号装置(32,34),用于接收由循环滑移检测器产生的输出信号; 和加法装置(24),用于将由粗信号装置输出的信号(32,34)加到由相敏检测器(18)输出的信号上,以控制可调谐振荡器(12)的频率。

    Waveform generation
    7.
    发明申请
    Waveform generation 失效
    波形生成

    公开(公告)号:US20060165203A1

    公开(公告)日:2006-07-27

    申请号:US10548115

    申请日:2004-02-12

    IPC分类号: H04L7/00

    CPC分类号: G06F1/0328

    摘要: A waveform generator for generating a smooth version of an original waveform which contains abrupt transitions, includes a phase accumulator incremented at successive sampling times to produce an output representative of the phase of the original waveform, a phase scaler arranged to convert the residual contents of the accumulator following a transition from phase to time, computing means responsive to the time to calculate a number of samples along a smooth transition, each offset by that time from the sampling times, and a sequencer to replace the otherwise abrupt transition with the sequence of samples from the computed smooth transition.

    摘要翻译: 用于产生包含突变的原始波形的平滑版本的波形发生器包括在连续采样时间递增的相位累加器,以产生代表原始波形的相位的输出;相位定标器,被布置成将 累加器在相对于时间的转变之后,响应于时间来计算沿着平滑过渡的每个样本的时间的计算装置,每个样本从采样时间偏移到该时间,以及定序器以用样本序列代替另外的突变过渡 从计算的平滑过渡。