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公开(公告)号：US12289669B2
公开(公告)日：2025-04-29
申请号：US17839597
申请日：2022-06-14
Applicant: Silicon Laboratories Inc.
Abstract: In one embodiment, a method includes: receiving, in an access point, a configuration request from a user, the configuration request comprising a first SSID; in response to the user request, entering into a monitor mode to identify one or more existing SSIDs of one or more existing access points in a local environment with the access point; and informing the user if the first SSID matches at least one of the existing SSIDs.
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公开(公告)号：US20250112658A1
公开(公告)日：2025-04-03
申请号：US18374843
申请日：2023-09-29
Applicant: Silicon Laboratories Inc.
Inventor： Abdulkerim L. Coban
IPC: H04B1/16
Abstract: A wideband power detector (peak or RMS) is placed in a base-band portion of a receiver chain implemented with a current mode RF front end. A differential transimpedance amplifier (TIA) includes a current sense circuit that replicates the input currents to the TIA as current sense output voltages without the current sense output voltages being affected by the filter characteristics of the TIA.
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公开(公告)号：US20250088345A1
公开(公告)日：2025-03-13
申请号：US18392416
申请日：2023-12-21
Applicant: Silicon Laboratories Inc.
Inventor： Xushuai Qu , Guner Arslan
Abstract: A wireless communications device includes a receiver having a phase detector configured to extract frequency offset and provide a corresponding error signal generated based on a baseband version of a received radio frequency signal and an expected transmitted data signal. The receiver has a phase-locked loop configured to generate an error correction signal based on a phase of the error signal and a predicted instantaneous phase of the error signal. The receiver has a correction circuit configured to provide a corrected baseband version of the received radio frequency signal based on the baseband version of the received radio frequency signal and the error correction signal. The receiver may have a re-encoding-based processing circuit configured to provide the expected transmitted data signal based on a preliminarily decoded symbol.
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公开(公告)号：US20250080140A1
公开(公告)日：2025-03-06
申请号：US18240636
申请日：2023-08-31
Applicant: Silicon Laboratories Inc.
Inventor： Thomas Edward Voor
Abstract: In one embodiment, an apparatus includes: a first radio frequency (RF) circuit to transmit and receive at a 2.4 GHz band according to a first wireless communication protocol; a second RF circuit to transmit and receive at a 2.4 GHz band according to a second wireless communication protocol; and a selection filter coupled to the first RF circuit and the second RF circuit. The selection filter may include: a first filter to couple to the first RF circuit, the first filter configured for a first wireless channel within the 2.4 GHz band; and a second filter to couple to the second RF circuit, the second filter configured for a second wireless channel within the 2.4 GHz band.
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公开(公告)号：US20250080134A1
公开(公告)日：2025-03-06
申请号：US18454111
申请日：2023-08-23
Applicant: Silicon Laboratories Inc.
Inventor： Gang Yuan
Abstract: In one aspect, an apparatus includes: a first feedback digital-to-analog converter (DAC) to receive a first feedback signal from a first successive approximation register (SAR) and output a first analog signal; a comparator to compare the first analog signal with a reference voltage; the first SAR to store a digital value based on the comparison and provide the first feedback signal to the first DAC; a second feedback DAC to receive a modulated quantized residual error based on the comparison and output a second analog signal; a second SAR to store a quantized residual error; and a delta-sigma modulator (DSM) to modulate the quantized residual error and provide the modulated quantized residual error to the second feedback DAC.
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Patent Agency Ranking
6.发明授权公开(公告)号：US12245182B2
公开(公告)日：2025-03-04
申请号：US17980704
申请日：2022-11-04
Applicant: Silicon Laboratories Inc.
Inventor： Guner Arslan
Abstract: A system and method to improve the accuracy of the measurement of round trip delay in a high accuracy distance measurement (HADM) is disclosed. In one embodiment, the traditional parabolic estimation is used. However, an estimation error is used to compensate for the inaccuracy of the parabolic estimation. This correction may reduce the standard deviation of a measurement by 50% or more. In another embodiment, the parabolic estimation is not used; rather, a different estimation is used, such as an absolute value estimation. In some tests, the absolute value estimation improved the mean measurement value and reduced the standard deviation by 50%.
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公开(公告)号：US20250063478A1
公开(公告)日：2025-02-20
申请号：US18529282
申请日：2023-12-05
Applicant: Silicon Laboratories Inc.
Inventor： Manav Kumar Mehta , Hasan Ali Stationwala , Atul Suresh Joshi , Mathieu Kardous , Ashish Bajaj
Abstract: A system and various methods to implement a Digital Twin with a low power Wi-Fi device is disclosed. The low power Wi-Fi device seeks a Digital Twin at the time of commissioning to serve as its proxy node while it is in sleep mode. Additionally, techniques to address the situation where the Digital Twin becomes unavailable are also disclosed. Finally, techniques to create and update a chain of Digital Twins are also disclosed.
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公开(公告)号：US20250060409A1
公开(公告)日：2025-02-20
申请号：US18235156
申请日：2023-08-17
Applicant: Silicon Laboratories Inc.
Inventor： Timothy Thomas Rueger , DeWitt Clinton Seward , Gang Yuan
IPC: G01R31/30 , G01R19/165 , G01R31/40 , G06F21/75
Abstract: Positive and negative glitch detectors detect glitches on a supply voltage node. The positive glitch detector has a capacitor and a resistor serially coupled between the supply voltage node and ground. An amplifier is coupled to a first node between the capacitor and resistor. A positive glitch results in the glitch on the first node (normally biased low) and generation of a clock pulse by the amplifier that causes a latch to assert its output to indicate the positive glitch. The negative glitch detector has a capacitor and resistor coupled in parallel between the supply voltage node and a second node. A negative glitch on the supply voltage node decreases the voltage on the second node (normally biased high) and an inverting amplifier coupled to the second node generates a clock pulse to cause a latch to assert its output to indicate the negative voltage glitch.
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公开(公告)号：US20250044393A1
公开(公告)日：2025-02-06
申请号：US18921236
申请日：2024-10-21
Applicant: Silicon Laboratories Inc.
Inventor： Anant Verma
Abstract: A system and method for performing production testing on high power semiconductor devices is disclosed. The system includes signal generators, RF meters, sockets, couplers and connectors which also function as switches when connected to an external cable. A calibration process is executed which allows the controller to create a correlation between measurements taken by the RF meter and the actual voltages, and power levels present at the device under test. By performing this calibration, it is possible to perform production testing of devices much more quickly and reliably.
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公开(公告)号：US20250036504A1
公开(公告)日：2025-01-30
申请号：US18225471
申请日：2023-07-24
Applicant: Silicon Laboratories Inc.
Inventor： Thomas David
Abstract: Methods of performing updates to a software image that is disposed in a read only memory or a one time programmable memory device are disclosed. The method includes causing an ECC error at the beginning of a function that has been modified. This ECC error causes an exception. The exception handler determines the address where the ECC error was detected was located and searches a dictionary. This dictionary contains entries that each have an original address in the ROM or OTP Memory and the patch address in a nonvolatile writable memory. The exception handler then causes the processing unit to jump to the patch address, where a modified function is located.
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