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公开(公告)号：US09965345B2
公开(公告)日：2018-05-08
申请号：US14686317
申请日：2015-04-14
发明人： Yi Chun Liu
CPC分类号： G06F11/073 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0649 , G06F3/0679 , G06F3/0688 , G06F11/076 , G06F11/079 , G06F11/0793 , G11C29/789 , H03M7/42 , H03M2201/834 , H04L1/0016
摘要： An apparatus for controlling programming of a non-volatile memory including at least one block partitioned into a plurality of physical sections, each of the physical sections including a plurality of memory cells, the apparatus including a controller configured to access a table including information corresponding to individual ones of the plurality of physical sections. The controller is configured to identify a first programming method for a first physical section of the plurality of physical sections and identify a second programming method for a second physical section of the plurality of physical sections according to information in the table corresponding to the first and second physical sections. The controller is also configured to program the first and second physical sections according to the first and second programming methods for the first and section physical sections, respectively.
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公开(公告)号：US20160085612A1
公开(公告)日：2016-03-24
申请号：US14686317
申请日：2015-04-14
发明人： Yi Chun LIU
CPC分类号： G06F11/073 , G06F3/0616 , G06F3/0619 , G06F3/064 , G06F3/0649 , G06F3/0679 , G06F3/0688 , G06F11/076 , G06F11/079 , G06F11/0793 , G11C29/789 , H03M7/42 , H03M2201/834 , H04L1/0016
摘要： An apparatus for controlling programming of a non-volatile memory including at least one block partitioned into a plurality of physical sections, each of the physical sections comprising a plurality of memory cells, the apparatus including a controller configured to access a table including information corresponding to individual ones of the plurality of physical sections. The controller is configured to identify a first programming method for a first physical section of the plurality of physical sections and identify a second programming method for a second physical section of the plurality of physical sections according to information in the table corresponding to the first and second physical sections. The controller is also configured to program the first and second physical sections according to the first and second programming methods for the first and section physical sections, respectively.
摘要翻译： 一种用于控制非易失性存储器的编程的装置，包括被划分成多个物理部分的至少一个块，每个物理部分包括多个存储器单元，所述装置包括控制器，被配置为访问包括对应于 多个物理部分中的个体部分。 所述控制器被配置为识别所述多个物理部分中的第一物理部分的第一编程方法，并且根据与所述第一和第二物理部分对应的表中的信息，识别所述多个物理部分中的第二物理部分的第二编程方法 物理部分。 控制器还被配置为分别根据第一和第二物理部分的第一和第二编程方法对第一和第二物理部分进行编程。
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公开(公告)号：US4626827A
公开(公告)日：1986-12-02
申请号：US475405
申请日：1983-03-15
CPC分类号： H03M1/00 , H04B14/046 , H03M2201/02 , H03M2201/162 , H03M2201/196 , H03M2201/198 , H03M2201/20 , H03M2201/3115 , H03M2201/4105 , H03M2201/4135 , H03M2201/4225 , H03M2201/4233 , H03M2201/4262 , H03M2201/531 , H03M2201/532 , H03M2201/534 , H03M2201/535 , H03M2201/648 , H03M2201/712 , H03M2201/715 , H03M2201/8128 , H03M2201/834
摘要： A data compression system comprises an analog-to-digital converter for quantizing the analog signal at a first sampling frequency into a series of digital samples and a memory for storing the digital samples. A control circuit generates a sampling datum indicating a variable sampling frequency lower than the first sampling frequency as a function of the instantaneous frequency of the analog signal for selecting digital samples from the memory, reads the selected digital samples out of the memory means in response to the sampling datum, and forms the sampling datum and the selected digital samples into a data set. A series of data sets may be transmitted to a receiving end of the system or stored in a recording medium. The sampling datum is used to indicate the point at which the digital sample is converted to a corresponding analog value.
摘要翻译： 数据压缩系统包括用于将第一采样频率的模拟信号量化成一系列数字样本的模数转换器和用于存储数字样本的存储器。 控制电路根据用于从存储器中选择数字样本的模拟信号的瞬时频率的函数产生指示低于第一采样频率的可变采样频率的采样数据，以响应于从存储器装置读出所选择的数字样本 采样数据，并将采样数据和所选择的数字样本组成数据集。 一系列数据集可以传送到系统的接收端或存储在记录介质中。 采样数据用于指示数字采样转换为相应模拟值的点。
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