公开(公告)号：US06309580B1

公开(公告)日：2001-10-30

申请号：US09107006

申请日：1998-06-30

申请人： Stephen Y. Chou

发明人： Stephen Y. Chou

IPC分类号： H01L1304

CPC分类号： B29C33/60 ,  B29C33/62 ,  B29C43/003 ,  B29C43/021 ,  B29C43/222 ,  B29C43/52 ,  B29C59/022 ,  B29C59/026 ,  B29C2043/023 ,  B29C2043/025 ,  B29C2043/3211 ,  B29C2043/568 ,  B29C2059/023 ,  G03F7/0002 ,  G03F9/7053 ,  Y10S977/887

摘要： The addition of thin coatings (less than and approaching monomolecular coatings) of persistent release materials comprising preferred compounds of the formula: RELEASE-M(X)n−1— RELEASE-M(X)n−m−1 Qm, or RELEASE-M(OR)n−1—, wherein RELEASE is a molecular chain of from 4 to 20 atoms in length, preferably from 6 to 16 atoms in length, which molecule has either polar or non-polar properties; M is a metal atom, semiconductor atom, or semimetal atom; X is halogen or cyano, especially Cl, F, or Br; Q is hydrogen or alkyl group; m is the number of Q groups; R is hydrogen, alkyl or phenyl, preferably hydrogen or alkyl of 1 to 4 carbon atoms; and; n is the valence −1 of M, and n−m−1 is at least 1 provides good release properties. The coated substrates are particularly good for a lithographic method and apparatus for creating ultra-fine (sub-25 nm) patterns in a thin film coated on a substrate is provided, in which a mold having at least one protruding feature is pressed into a thin film carried on a substrate. The protruding feature in the mold creates a recess of the thin film. The mold is removed from the film. The thin film then is processed such that the thin film in the recess is removed exposing the underlying substrate. Thus, the patterns in the mold is replaced in the thin film, completing the lithography. The patterns in the thin film will be, in subsequent processes, reproduced in the substrate or in another material which is added onto the substrate.

摘要翻译： 持续释放材料的薄涂层（小于和接近单分子涂层）的添加包括优选的下式化合物：或RELEASE是长度为4至20个原子，优选6至16个原子长度的分子链，该分子具有 极性或非极性; M是金属原子，半导体原子或半金属原子; X是卤素或氰基，特别是Cl，F或Br; Q是氢或烷基; m是Q基团的数目; R是氢，烷基或苯基，优选氢或1至4个碳原子的烷基; 和n是M的化合价-1，n-m-1至少为1提供了良好的脱模性能。 涂布的基材特别适用于光刻方法，并且提供了在涂布在基材上的薄膜中产生超细（次25nm）图案的设备，其中具有至少一个突出特征的模具被压入薄 薄膜承载在基板上。 模具中的突出特征产生薄膜的凹部。 模具从薄膜中取出。 然后对薄膜进行处理，使得去除暴露下面的基底的凹槽中的薄膜。 因此，在薄膜中更换模具中的图案，完成光刻。 在随后的工艺中，薄膜中的图案将在衬底中或在添加到衬底上的另一种材料中再现。

公开(公告)号：US06563162B2

公开(公告)日：2003-05-13

申请号：US10102312

申请日：2002-03-19

申请人： Myoung-Hee Han ,  Young-Hoon Park ,  Ju-Wan Kim ,  Ju-Bum Lee

发明人： Myoung-Hee Han ,  Young-Hoon Park ,  Ju-Wan Kim ,  Ju-Bum Lee

IPC分类号： H01L1304

CPC分类号： H01L27/10855 ,  H01L21/76897 ,  H01L23/5222 ,  H01L27/10885 ,  H01L28/90 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device for reducing parasitic bit line capacitance and a method of fabricating the same are provided. The semiconductor memory device includes a conductive pad formed on a semiconductor substrate and a first interlayer insulating layer having a first contact hole that exposes the conductive pad. The first interlayer insulating layer is formed on the conductive pad and the semiconductor substrate. Bit line stacks are formed on the first interlayer insulating layer. Bit line spacers are formed from a combination of materials having different dielectric constants on the sidewalls of the bit line stack to reduce the parasitic bit line capacitance. Preferably, the bit line spacers are stack layers including silicon nitride, silicon oxide, and silicon nitride. A second interlayer insulating layer having a second contact hole is formed on the bit line stack. A conductive plug fills the first and second contact holes. A storage electrode of a capacitor is formed on the conductive plug to be connected to the conductive pad.