Engineered substrate
    3.
    发明授权

    公开(公告)号:US11430910B2

    公开(公告)日:2022-08-30

    申请号:US16074348

    申请日:2017-02-01

    申请人: Soitec

    摘要: An engineered substrate comprises: a seed layer made of a first semiconductor material for growth of a solar cell; a support substrate comprising a base and a surface layer epitaxially grown on a first side of the base, the base and the surface layer made of a second semiconductor material; a direct bonding interface between the seed layer and the surface layer; wherein a doping concentration of the surface layer is higher than a predetermined value such that the electrical resistivity at the direct bonding interface is below 10 mOhm·cm2, preferably below 1 mOhm·cm2; and wherein a doping concentration of the base as well as the thickness of the engineered substrate are such that absorption of the engineered substrate is less than 20%, preferably less than 10%, and total area-normalized series resistance of the engineered substrate is less than 10 mOhm·cm2, preferably less than 1 mOhm·cm2.

    ELECTRONIC DEVICE AND METHOD FOR PRODUCING THE SAME

    公开(公告)号:US20220238732A1

    公开(公告)日:2022-07-28

    申请号:US17611713

    申请日:2020-05-26

    发明人: Junya ISHIZAKI

    摘要: A method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: having a first wafer having solar cell structures on a starting substrate and a second wafer having drive circuits formed, so that either one of the first wafer or the second wafer has a plurality of independent diode circuits and capacitor-function laminated portions; obtaining a bonded wafer by bonding so that the solar cell structures, the diode circuits, the capacitor-function laminated portions, and the drive circuits are superimposed; wiring; and dicing the bonded wafer; thus creating a method for producing an electronic device including a drive circuit, a solar cell structure, and a capacitor-function portion in one chip and having a suppressed production cost; and such an electronic device.

    Monolithic metamorphic multi-junction solar cell

    公开(公告)号:US11374140B2

    公开(公告)日:2022-06-28

    申请号:US17373254

    申请日:2021-07-12

    IPC分类号: H01L31/0725 H01L31/0735

    摘要: A monolithic metamorphic multi-junction solar cell comprising a first III-V subcell and a second III-V subcell and a third III-V subcell and a fourth Ge subcell, wherein the subcells are stacked on top of each other in the indicated order, and the first subcell forms the topmost subcell, and a metamorphic buffer is formed between the third subcell and the fourth subcell and all subcells each have an n-doped emitter layer and a p-doped base layer, and the emitter layer of the second subcell is greater than the base layer.

    MONOLITHIC METAMORPHIC MULTI-JUNCTION SOLAR CELL

    公开(公告)号:US20220013678A1

    公开(公告)日:2022-01-13

    申请号:US17373254

    申请日:2021-07-12

    IPC分类号: H01L31/0725 H01L31/0735

    摘要: A monolithic metamorphic multi-junction solar cell comprising a first III-V subcell and a second III-V subcell and a third III-V subcell and a fourth Ge subcell, wherein the subcells are stacked on top of each other in the indicated order, and the first subcell forms the topmost subcell, and a metamorphic buffer is formed between the third subcell and the fourth subcell and all subcells each have an n-doped emitter layer and a p-doped base layer, and the emitter layer of the second subcell is greater than the base layer.

    STACKED MONOLITHIC MULTIJUNCTION SOLAR CELL

    公开(公告)号:US20220013676A1

    公开(公告)日:2022-01-13

    申请号:US17373199

    申请日:2021-07-12

    摘要: A stacked monolithic multijunction solar cell, which includes a first subcell having a p-n junction with an emitter layer and a base layer, the thickness of the emitter layer being less than the thickness of the base layer at least by a factor of ten, and the first subcell comprising a substrate having a semiconductor material from the groups III and V or a substrate from the group IV, and which further includes a second subcell arranged on the first subcell and a third subcell arranged on the second subcell, the two subcells each including an emitter layer and a base layer, and a tunnel diode and a back side field layer each being formed between the subcells, the thickness of the emitter layer being greater than the thickness of the base layer in each case between the second subcell and in the third subcell.