公开(公告)号：WO2007142912A3

公开(公告)日：2007-12-13

申请号：PCT/US2007/012604

申请日：2007-05-24

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  WALTHER, Steven, R. ,  MEHTA, Sandeep

Inventor： WALTHER, Steven, R. ,  MEHTA, Sandeep

IPC: H01J37/317 ,  H01J37/302

Abstract: A method includes receiving an input signal representative of a desired two-dimensional non-uniform dose pattern for a front surface of a workpiece, driving the workpiece relative to an ion beam to distribute the ion beam across the front surface of the workpiece, and controlling at least one parameter of an ion impianter when the ion beam is incident on the front surface of the workpiece to directly create the desired two-dimensional non-uniform dose pattern in one pass of the front surface of workpiece relative to the ion beam. The beam may be a scanned beam or a ribbon beam. An ion impianter is also provided.

公开(公告)号：WO2005114692A3

公开(公告)日：2006-03-02

申请号：PCT/US2005017699

申请日：2005-05-19

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ,  SINGH VIKRAM ,  GUPTA ATUL ,  PERSING HAROLD M ,  WALTHER STEVEN R ,  TESTONI ANNE L

Inventor： SINGH VIKRAM ,  GUPTA ATUL ,  PERSING HAROLD M ,  WALTHER STEVEN R ,  TESTONI ANNE L

IPC: H01J37/32

CPC classification number: H01J37/32495 ,  H01J37/32412

Abstract: A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system including a process chamber, a source for producing a plasma in the process chamber, a platen for holding the substrate in the process chamber, and a voltage source for accelerating ions from the plasma into the substrate, depositing on interior surfaces of the process chamber a fresh coating that is similar in composition to a deposited film that results from plasma ion implantation of the substrate, before depositing the fresh coating, cleaning interior surfaces of the process chamber by removing an old film using one or more activated cleaning precursors, plasma ion implantation of the substrate according to a plasma ion implantation process, and repeating the steps of cleaning interior surfaces of the process chamber and depositing a fresh coating following plasma ion implantation of one or more substrates.

公开(公告)号：WO2005114692A9

公开(公告)日：2006-01-19

申请号：PCT/US2005017699

申请日：2005-05-19

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ,  SINGH VIKRAM ,  GUPTA ATUL ,  PERSING HAROLD M ,  WALTHER STEVEN R ,  TESTONI ANNE L

Inventor： SINGH VIKRAM ,  GUPTA ATUL ,  PERSING HAROLD M ,  WALTHER STEVEN R ,  TESTONI ANNE L

IPC: H01J37/32

CPC classification number: H01J37/32495 ,  H01J37/32412

Abstract: A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system including a process chamber, a source for producing a plasma in the process chamber, a platen for holding the substrate in the process chamber, and a voltage source for accelerating ions from the plasma into the substrate, depositing on interior surfaces of the process chamber a fresh coating that is similar in composition to a deposited film that results from plasma ion implantation of the substrate, before depositing the fresh coating, cleaning interior surfaces of the process chamber by removing an old film using one or more activated cleaning precursors, plasma ion implantation of the substrate according to a plasma ion implantation process, and repeating the steps of cleaning interior surfaces of the process chamber and depositing a fresh coating following plasma ion implantation of one or more substrates.

Abstract translation: 用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其包括处理室，用于在处理室中产生等离子体的源，用于将衬底保持在处理室中的压板和用于加速离子的电压源 从等离子体进入衬底，在沉积新鲜涂层之前，在沉积新鲜涂层之前，在处理室的内表面上沉积与组合物中与等离子体离子注入导致的沉积膜相似的新涂层，清洁处理室的内表面 通过使用一种或多种激活的清洁前体去除旧膜，根据等离子体离子注入工艺等离子体离子注入基板，并重复清洁处理室的内表面并在等离子体离子注入之后沉积新涂层的步骤 或更多的基材。

公开(公告)号：WO2005115104A2

公开(公告)日：2005-12-08

申请号：PCT/US2005/016219

申请日：2005-05-09

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  WALTHER, Steven, R. ,  FANG, Ziwei ,  TOCCO, Justin ,  ELLIS, Carleton, F., III

Inventor： WALTHER, Steven, R. ,  FANG, Ziwei ,  TOCCO, Justin ,  ELLIS, Carleton, F., III

IPC: C23C14/48 ,  H01J37/32 ,  H01L21/223 ,  H01L21/26 ,  H01L21/42

CPC classification number: H01J37/32412 ,  C23C14/48 ,  H01L21/2236

Abstract: A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system having a process chamber, a source for producing a plasma in the process chamber, a platen for holding a substrate in the process chamber, an anode spaced from the platen, and a pulse source for generating implant pulses for accelerating ions from the plasma into the substrate. In one aspect, a parameter of an implant process is varied to at least partially compensate for undesired effects of interaction between ions being implanted and the substrate. For example, dose rate, ion energy, or both may be varied during the implant process. In another aspect, a pretreatment step includes accelerating ions from the plasma to the anode to cause emission of secondary electrons from the anode, and accelerating the secondary electrons from the anode to a substrate for pretreatment of the substrate.

Abstract translation: 用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其具有处理室，用于在处理室中产生等离子体的源，用于在处理室中保持衬底的压板，与压板隔开的阳极， 以及用于产生用于将离子从等离子体加速到衬底中的注入脉冲的脉冲源。 在一个方面，改变注入过程的参数以至少部分地补偿被植入的离子与衬底之间的相互作用的不期望的影响。 例如，剂量率，离子能量或二者可以在植入过程期间变化。 另一方面，预处理步骤包括将离子从等离子体加速到阳极，以引起来自阳极的二次电子的发射，以及将二次电子从阳极加速至衬底以进行预处理。

公开(公告)号：WO2012058445A2

公开(公告)日：2012-05-03

申请号：PCT/US2011/058116

申请日：2011-10-27

Applicant: ADVANCED ELECTRON BEAMS, INC. ,  BARRY, Kenneth, J. ,  BROWN, Mark, T. ,  BUFANO, Michael, L. ,  FRIEDMAN, Gerald, M. ,  KING, Peter, M. ,  MEDFORD, Matthew, A. ,  TESTONI, Anne, L. ,  WALTHER, Steven, R.

Inventor： BARRY, Kenneth, J. ,  BROWN, Mark, T. ,  BUFANO, Michael, L. ,  FRIEDMAN, Gerald, M. ,  KING, Peter, M. ,  MEDFORD, Matthew, A. ,  TESTONI, Anne, L. ,  WALTHER, Steven, R.

IPC: H01J1/50

CPC classification number: H01J33/04 ,  G21K1/00

Abstract: Systems and methods for manufacturing a vacuum device, such as an electron emitter, that includes a foil exit window placed over and joined to a support grid. In one particular method, the vacuum chamber of an election emitter has a thin foil forming an exit window at one end. The thin foil may be titanium or any suitable material and the foil will typically enlarge during a bonding process that attaches the foil to the support grid. In one manufacturing process, the support grid is provided with a surface that has contours, typically being smooth recessed surfaces, that the foil, once enlarged, can lie against as the vacuum pulls the foil against the grid.

Abstract translation: 用于制造真空装置（例如电子发射器）的系统和方法，所述真空装置包括放置在支撑格栅上并连接到支撑格栅上的箔片出射窗口。 在一个特定的方法中，选择发射极的真空室具有在一端形成出射窗的薄箔。 薄箔可以是钛或任何合适的材料，并且在将箔附着到支撑格栅的粘合过程期间，箔通常会增大。 在一个制造过程中，支撑格栅具有具有轮廓的表面，典型地为光滑的凹陷表面，箔片一旦被放大就可以抵靠，因为真空将箔片拉向格栅。

公开(公告)号：WO2009002737A1

公开(公告)日：2008-12-31

申请号：PCT/US2008/066938

申请日：2008-06-13

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  WALTHER, Steven, R. ,  KOO, Bon-Woong ,  LINDSAY, Bernard, G.

Inventor： WALTHER, Steven, R. ,  KOO, Bon-Woong ,  LINDSAY, Bernard, G.

IPC: H01L21/66 ,  H01L21/3065 ,  G01R31/26

CPC classification number: H01J37/3299 ,  H01J37/32935

Abstract: Techniques for detecting wafer charging in a plasma processing system are disclosed. In one particular exemplary embodiment, the techniques may be realized as an apparatus for detecting wafer charging in a plasma processing system. The apparatus may comprise a plasma chamber to produce a plasma discharge above a wafer in the plasma chamber. The apparatus may also comprise a biasing circuit to bias the wafer to draw ions from the plasma discharge towards the wafer. The apparatus may further comprise a detection mechanism to detect charge buildup on the wafer by measuring an electric field in one or more designated locations near a top surface of the wafer.

Abstract translation: 公开了一种在等离子体处理系统中检测晶片充电的技术。 在一个特定的示例性实施例中，这些技术可以被实现为用于在等离子体处理系统中检测晶片充电的装置。 该装置可以包括等离子体室，以在等离子体室中的晶片之上产生等离子体放电。 该装置还可以包括偏置电路，用于偏置晶片以从离子放电中向离子晶片吸取离子。 该装置还可以包括检测机构，以通过测量在晶片顶表面附近的一个或多个指定位置的电场来检测晶片上的电荷积累。

公开(公告)号：WO2007142912A2

公开(公告)日：2007-12-13

申请号：PCT/US2007012604

申请日：2007-05-24

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ,  WALTHER STEVEN R ,  MEHTA SANDEEP

Inventor： WALTHER STEVEN R ,  MEHTA SANDEEP

CPC classification number: H01J37/3171 ,  H01J37/3026 ,  H01J37/3172 ,  H01J2237/30461 ,  H01J2237/30472 ,  H01J2237/30488 ,  H01J2237/31703 ,  H01J2237/3171

Abstract: A method includes receiving an input signal representative of a desired two-dimensional non-uniform dose pattern for a front surface of a workpiece, driving the workpiece relative to an ion beam to distribute the ion beam across the front surface of the workpiece, and controlling at least one parameter of an ion impianter when the ion beam is incident on the front surface of the workpiece to directly create the desired two-dimensional non-uniform dose pattern in one pass of the front surface of workpiece relative to the ion beam. The beam may be a scanned beam or a ribbon beam. An ion impianter is also provided.

Abstract translation: 一种方法包括接收表示工件前表面的期望的二维不均匀剂量图案的输入信号，相对于离子束驱动工件以将离子束分布在工件的前表面上，并且控制 当离子束入射到工件的前表面上时直接产生所需的二维非均匀剂量图案，该工件相对于离子束在工件表面的一次通过中，离子夹持器的至少一个参数。 光束可以是扫描光束或带状光束。 还提供了一种离子夹持器。

公开(公告)号：WO2006026180A3

公开(公告)日：2006-08-03

申请号：PCT/US2005029454

申请日：2005-08-18

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ,  EROKHIN YURI ,  JEONG UKYO ,  SCHEUER JAY T ,  WALTHER STEVEN R

Inventor： EROKHIN YURI ,  JEONG UKYO ,  SCHEUER JAY T ,  WALTHER STEVEN R

IPC: H01L21/225 ,  H01L21/265 ,  H01L21/336 ,  H01L29/78

CPC classification number: H01L21/2236 ,  H01L29/66575

Abstract: A method for fabricating a semiconductor-based device includes providing a doped semiconductor substrate, introducing a second dopant into the substrate to define a pn junction, and introducing a neutralizing species into the substrate in the neighborhood of the pn junction to reduce a capacitance associated with the pn junction. A semiconductor-based device includes a semiconductor substrate having first and second dopants, and a neutralizing species. The first and second dopants define a pn junction, and the neutralizing species neutralizes a portion of the first dopant in the neighborhood of the pn junction to decrease a capacitance associated with the pn junction.

Abstract translation: 一种用于制造基于半导体的器件的方法包括提供掺杂的半导体衬底，将第二掺杂剂引入到衬底中以限定pn结，并将中和物质引入到pn结附近的衬底中，以减少与 pn结。 基于半导体的器件包括具有第一和第二掺杂剂的半导体衬底和中和物质。 第一和第二掺杂剂限定pn结，并且中和物质中和pn结附近的第一掺杂剂的一部分以减少与pn结相关联的电容。

公开(公告)号：WO2005114692A2

公开(公告)日：2005-12-01

申请号：PCT/US2005/017699

申请日：2005-05-19

Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  SINGH, Vikram ,  GUPTA, Atul ,  PERSING, Harold, M. ,  WALTHER, Steven, R. ,  TESTONI, Anne, L.

Inventor： SINGH, Vikram ,  GUPTA, Atul ,  PERSING, Harold, M. ,  WALTHER, Steven, R. ,  TESTONI, Anne, L.

IPC: H01J37/00

CPC classification number: H01J37/32495 ,  H01J37/32412

Abstract: A method for plasma ion implantation of a substrate includes providing a plasma ion implantation system including a process chamber, a source for producing a plasma in the process chamber, a platen for holding the substrate in the process chamber, and a voltage source for accelerating ions from the plasma into the substrate, depositing on interior surfaces of the process chamber a fresh coating that is similar in composition to a deposited film that results from plasma ion implantation of the substrate, before depositing the fresh coating, cleaning interior surfaces of the process chamber by removing an old film using one or more activated cleaning precursors, plasma ion implantation of the substrate according to a plasma ion implantation process, and repeating the steps of cleaning interior surfaces of the process chamber and depositing a fresh coating following plasma ion implantation of one or more substrates.

Abstract translation: 用于等离子体离子注入衬底的方法包括提供等离子体离子注入系统，其包括处理室，用于在处理室中产生等离子体的源，用于将衬底保持在处理室中的压板和用于加速离子的电压源 从等离子体进入衬底，在沉积新鲜涂层之前，在沉积新鲜涂层之前，在处理室的内表面上沉积与组合物中与等离子体离子注入导致的沉积膜相似的新涂层，清洁处理室的内表面 通过使用一种或多种激活的清洁前体去除旧膜，根据等离子体离子注入工艺等离子体离子注入基板，并重复清洁处理室的内表面并在等离子体离子注入之后沉积新涂层的步骤 或更多的基材。

公开(公告)号：WO2011011278A1

公开(公告)日：2011-01-27

申请号：PCT/US2010/042260

申请日：2010-07-16

Applicant: ADVANCED ELECTRON BEAMS, INC. ,  WALTHER, Steven, R. ,  FRIEDMAN, Gerald, M. ,  BUFANO, Michael, L.

Inventor： WALTHER, Steven, R. ,  FRIEDMAN, Gerald, M. ,  BUFANO, Michael, L.

IPC: G21K5/00 ,  H01J5/18 ,  H01J33/04 ,  H01J37/301

CPC classification number: G21K5/00 ,  H01J5/18 ,  H01J33/04 ,  H01J2237/164 ,  Y10T156/10

Abstract: An exit window (15) can include an exit window foil (12), and a support grid (13) contacting and supporting the exit window foil. The support grid can have first and second grids (16, 18), each having respective first and second grid portions (16c, 18c) that are positioned in an alignment and thermally isolated from each other, The first and second grid portions can each have a series of apertures (16a, 18a) that are aligned for allowing the passage of a beam (14) therethrough to reach and pass through the exit window foil (12). The second grid portion (18c) can contact the exit window foil. The first grid portion (16c) can mask the second grid portion (18c) and the exit window foil (12) from heat caused by the beam striking the first grid portion (16e).

Abstract translation: 出口窗口（15）可以包括出口窗口薄片（12）和与出口窗口箔片接触和支撑的支撑格栅（13）。 支撑格栅可以具有第一和第二格栅（16,18），每个格栅具有彼此对准且热隔离的相应的第一和第二格栅部分（16c，18c）。第一格栅部分和第二格栅部分可以各自具有 对准的一系列孔口（16a，18a），用于允许梁（14）通过其穿过并穿过出口窗口薄片（12）。 第二格栅部分（18c）可以与出口窗口箔接触。 第一格栅部分（16c）可以遮挡第二格栅部分（18c）和出射窗口箔片（12）免受由光束撞击到第一格栅部分（16e）所引起的热。