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    CONDENSIBLE GAS COOLING SYSTEM
    1.
    发明申请
    CONDENSIBLE GAS COOLING SYSTEM 审中-公开
    可燃气体冷却系统

    公开(公告)号：WO2010080390A2

    公开(公告)日：2010-07-15

    申请号：PCT/US2009/068002

    申请日：2009-12-15

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES ,  WALTHER, Steven, R.

    Inventor： WALTHER, Steven, R.

    IPC: H01L21/265 ,  H01L21/683 ,  H01L21/687

    CPC classification number: H01J37/3171 ,  H01J37/20 ,  H01J2237/002 ,  H01J2237/2001

    Abstract: A workpiece cooling system and method are disclosed. Transferring heat away from a workpiece, such as a semiconductor wafer during ion implantation, is essential. Typically this heat is transferred to the workpiece support, or platen. In one embodiment, the desired operating temperature is determined. Based on this, a gas having a vapor pressure within a desired range, such as 10-50 torr, is selected. This range is required to be sufficiently low so as to be less than the clamping force. This condensible gas is used to fill the volume between the workpiece and the workpiece support. Heat transfer occurs based on adsorption and desorption, thereby offering improved transfer properties than traditionally employed gases, such as helium, hydrogen, nitrogen, argon and air.

    Abstract translation: 公开了一种工件冷却系统和方法。 在离子注入期间将热量从工件（例如半导体晶片）传出是至关重要的。 通常，这种热量传递到工件支撑件或压板。 在一个实施例中，确定期望的操作温度。 基于此，选择蒸气压在所需范围内的气体，例如10-50乇。 该范围要求足够低以便小于夹紧力。 该可冷凝气体用于填充工件和工件支架之间的体积。 基于吸附和解吸发生热传递，从而提供比传统使用的气体（例如氦气，氢气，氮气，氩气和空气）更好的转移性能。

    CONFORMAL DOPING USING HIGH NEUTRAL PLASMA IMPLANT
    3.
    发明申请
    CONFORMAL DOPING USING HIGH NEUTRAL PLASMA IMPLANT 审中-公开
    使用高中等离子体植入物进行均匀切割

    公开(公告)号：WO2009009272A2

    公开(公告)日：2009-01-15

    申请号：PCT/US2008/067587

    申请日：2008-06-20

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  WALTHER, Steven, R.

    Inventor： WALTHER, Steven, R.

    IPC: C23C16/00 ,  H01L21/26

    CPC classification number: H01J37/32339 ,  H01J37/32412

    Abstract: A plasma doping apparatus includes a plasma source that generates a pulsed plasma. A platen supports a substrate proximate to the plasma source for plasma doping. A structure absorbs a film which provides a plurality of neutrals when desorbed. A bias voltage power supply generates a bias voltage waveform having a negative potential that attracts ions in the plasma to the substrate for plasma doping. A radiation source irradiates the film absorbed on the structure, thereby desorbing the film and generating a plurality of neutrals that scatter ions from the plasma while the ions are being attracted to the substrate, thereby performing conformal plasma doping.

    Abstract translation: 等离子体掺杂装置包括产生脉冲等离子体的等离子体源。 压板支撑靠近等离子体源的基板用于等离子体掺杂。 结构吸收当解吸时提供多个中性粒子的膜。 偏置电压电源产生具有负电位的偏压电压波形，其将等离子体中的离子吸引到用于等离子体掺杂的衬底。 辐射源照射吸收在结构上的膜，从而解离该膜并产生多个中和体，其中离子从等离子体中散射，同时离子被吸引到衬底上，由此进行保形等离子体掺杂。

    REDUCTION OF SOURCE AND DRAIN PARASITIC CAPACITANCE IN CMOS DEVICES
    5.
    发明申请
    REDUCTION OF SOURCE AND DRAIN PARASITIC CAPACITANCE IN CMOS DEVICES 审中-公开
    CMOS器件中源极和漏极寄生电容的降低

    公开(公告)号：WO2006026180A2

    公开(公告)日：2006-03-09

    申请号：PCT/US2005/029454

    申请日：2005-08-18

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  EROKHIN, Yuri ,  JEONG, Ukyo ,  SCHEUER, Jay, T. ,  WALTHER, Steven, R.

    Inventor： EROKHIN, Yuri ,  JEONG, Ukyo ,  SCHEUER, Jay, T. ,  WALTHER, Steven, R.

    IPC: H01L21/225 ,  H01L21/265 ,  H01L21/336 ,  H01L29/78

    CPC classification number: H01L21/2236 ,  H01L29/66575

    Abstract: A method for fabricating a semiconductor-based device includes providing a doped semiconductor substrate, introducing a second dopant into the substrate to define a pn junction, and introducing a neutralizing species into the substrate in the neighborhood of the pn junction to reduce a capacitance associated with the pn junction. A semiconductor-based device includes a semiconductor substrate having first and second dopants, and a neutralizing species. The first and second dopants define a pn junction, and the neutralizing species neutralizes a portion of the first dopant in the neighborhood of the pn junction to decrease a capacitance associated with the pn junction.

    Abstract translation: 用于制造基于半导体的器件的方法包括提供掺杂的半导体衬底，将第二掺杂剂引入到衬底中以限定pn结，并且将中和物质引入衬底中的邻近衬底 pn结以减小与pn结相关联的电容。 基于半导体的器件包括具有第一和第二掺杂剂以及中和物质的半导体衬底。 第一和第二掺杂剂限定pn结，并且中和物质中和pn结附近的第一掺杂剂的一部分，以减小与pn结相关的电容。

    TWO-DIEMENSIONAL UNIFORMITY CORRECTION FOR ION BEAM ASSISTED ETCHING
    8.
    发明申请
    TWO-DIEMENSIONAL UNIFORMITY CORRECTION FOR ION BEAM ASSISTED ETCHING 审中-公开
    用于离子束辅助蚀刻的双重均匀校正

    公开(公告)号：WO2009045722A1

    公开(公告)日：2009-04-09

    申请号：PCT/US2008/076644

    申请日：2008-09-17

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC. ,  WALTHER, Steven, R. ,  NUNAN, Peter, D. ,  EROKHIN, Yuri

    Inventor： WALTHER, Steven, R. ,  NUNAN, Peter, D. ,  EROKHIN, Yuri

    IPC: H01L21/265

    CPC classification number: H01J37/3171 ,  H01J37/244 ,  H01J37/3045 ,  H01J37/3053 ,  H01J2237/24507 ,  H01J2237/24542 ,  H01J2237/30477 ,  H01L21/3065 ,  H01L22/12

    Abstract: An approach for providing two-dimensional uniformity correction for ion beam assisted etching is described. In one embodiment, there is a method for ion beam etching a substrate. In this embodiment, an ion implant dose map containing a correlation between implant dose rate and etch rate is retrieved. In addition, a recipe that contains values for ion beam parameters used in the ion beam etching of the substrate is obtained. An ion beam is directed at the surface of the substrate and the surface is etched with the ion beam according to the ion implant dose map and the values of the ion beam parameters in the recipe. The etching of the surface is controlled in accordance with the ion implant dose map and the ion beam parameter values.

    Abstract translation: 描述了一种用于离子束辅助蚀刻提供二维均匀性校正的方法。 在一个实施例中，存在用于离子束蚀刻衬底的方法。 在该实施例中，检索包含植入物剂量率和蚀刻速率之间的相关性的离子注入剂量图。 此外，获得了包含用于衬底的离子束蚀刻中的离子束参数的值的配方。 离子束被引导到衬底的表面，并且根据离子注入剂量图和配方中离子束参数的值，用离子束蚀刻表面。 根据离子注入剂量图和离子束参数值来控制表面的蚀刻。

    TECHNIQUE FOR LOW-TEMPERATURE ION IMPLANTATION
    10.
    发明申请
    TECHNIQUE FOR LOW-TEMPERATURE ION IMPLANTATION 审中-公开
    低温离子注入技术

    公开(公告)号：WO2008020972A3

    公开(公告)日：2008-06-26

    申请号：PCT/US2007016807

    申请日：2007-07-26

    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ,  ENGLAND JONATHAN GERALD ,  WALTHER STEVEN R ,  MUKA RICHARD S ,  BLAKE JULIAN ,  MURPHY PAUL J ,  LIEBERT REUEL B

    Inventor： ENGLAND JONATHAN GERALD ,  WALTHER STEVEN R ,  MUKA RICHARD S ,  BLAKE JULIAN ,  MURPHY PAUL J ,  LIEBERT REUEL B

    IPC: H01L21/00

    CPC classification number: H01L21/67213 ,  H01L21/26593 ,  H01L21/67098 ,  H01L21/67109 ,  H01L21/67248

    Abstract: A technique for low-temperature ion implantation is disclosed. In one particular exemplary embodiment, the technique may be realized as an apparatus for low-temperature ion implantation. The apparatus may comprise a pre-chill station located in proximity to an end station in an ion implanter. The apparatus may also comprise a cooling mechanism within the pre-chill station. The apparatus may further comprise a loading assembly coupled to the pre-chill station and the end station. The apparatus may additionally comprise a controller in communication with the loading assembly and the cooling mechanism to coordinate loading a wafer into the pre-chill station, cooling the wafer down to a predetermined temperature range, and loading the cooled wafer into the end station where the cooled wafer undergoes an ion implantation process.

    Abstract translation: 公开了一种用于低温离子注入的技术。 在一个特定的示例性实施例中，该技术可以被实现为用于低温离子注入的装置。 该设备可以包括位于离子注入机中的终端站附近的预冷站。 该设备还可以包括预冷站内的冷却机构。 该设备可以进一步包括耦合到预冷站和终端站的加载组件。 该设备可以另外包括与加载组件和冷却机构通信的控制器，以协调将晶片加载到预冷站中，将晶片冷却到预定的温度范围，并将冷却后的晶片加载到终端站中， 经过冷却的晶片经历离子注入工艺。

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