Abstract:
Technologies for correcting flipped bits prior to performing an error correction decode process include an apparatus that includes a memory to store a redundant set of codewords and a controller to read data from the memory. The controller selects a codword from the redundant set of codewords to read from the memory, analyzes the selected codewords to determine whether the codeword contains uncorrectable errors, reads remaining codewords in the redundant set that correspond to the selected codeword, combines the remaining codewords together to generate a rebuilt codeword, flips bits in sections of the rebuilt codeword that differ from the selected codeword by a threshold amount, and performs an error correction decode process based on the rebuilt codeword.
Abstract:
The present invention relates to a method and a device for an error correction of transmitted data. For this purpose, the transmitted data are encoded in a block code, wherein the block code comprises a number of data bits and an additional number of redundant bits. Herein the block code is described by a parity-check matrix H, wherein columns of the parity-check matrix Hare inherently related to the data bits of the block code. The method according to the present invention comprises the following steps: (a) diagonalizing the parity-check matrix H, with respect to at least one column of the parity-check matrix H,into a diagonalized parity-check matrix H', wherein the diagonalized parity-check matrix H' is related to the block code and to the at least one column; (b) determining at least one error position (130) in the block code by using the diagonalized parity-check matrix H' and a syndrome vector, wherein the syndrome vector is related to the data bits in the block code; (c) performing the error correction of the transmitted data at the at least one error position (130) in the block code. The present method and device allow providing communication channels with increased reliability and enhanced correction capability at reduced complexity,and is generally applicable to all known block codes, such as turbo, LDPC, BCH, or Reed-Solomon codes.
Abstract:
Systems and methods for decoding block and concatenated codes are provided. These include advanced iterative decoding techniques based on belief propagation algorithms, with particular advantages when applied to codes having higher density parity check matrices. During iterations of the belief propagation, variable-to-check messages may be calculated. According to some embodiments, a scaling factor may be calculated based on the smallest absolute values in a set of variable-to-check messages, and may be used to scale the messages passed during the belief propagation. According to other embodiments, the positive or negative signs of the variable-to-check messages may be compared and used to generate a modified variable-to-check message. According to other embodiments, sparse parity check matrices may be generated and used to produce updated log-likelihood ratios with soft-input soft-output message passing. These and other improvements enhance the decoding of H/M/LDPC codes, including Reed-Solomon codes which may be used in HD Radio systems.
Abstract:
A method of searching for candidate codewords for a telecommunications system, the method comprising receiving a sequence of constellation points, producing a received FEC vector comprised of bits from the received constellation points, comparing the received FEC vector with a plurality of candidate codewords within a Dorsch decoding process using an ordered pattern, and terminating the search when a candidate codeword from among the plurality of candidate codewords is found residing within a predetermined range of a specified distance of the received FEC vector.
Abstract:
Certain embodiments of the present invention are methods for the organization of trapping- set profiles in ROM and for the searching of those profiles during (LDPC) list decoding. Profiles are ranked by dominance, i.e., by their impact on the error-floor characteristics of a decoder. More -dominant trapping-set profiles contain information about both unsatisfied check nodes (USCs) and mis-satisfied check nodes (MSCs), while less-dominant trapping-set profiles contain information about only USCs. Trapping-set profile information is organized into a number of linked, hierarchical data tables which allow for the rapid location and retrieval of most-dominant matching trapping-set profiles using a pointer- chase search.
Abstract:
Certain aspects of the present disclosure generally relate to methods and apparatus for decoding low density parity check (LDPC) codes, and more particularly to an efficient list decoder for list decoding low density parity check (LDPC) codes.
Abstract:
本发明实施例提供一种译码处理方法及译码器,该方法包括:获取Turbo码生成矩阵G turbo 与循环冗余校验CRC生成矩阵G crc 的联合生成矩阵G com ,并获取Turbo码译码器输出的对数似然比值序列;釆用所述联合生成矩阵G com 和所述对数似然比值序列,进行CRC辅助的Turbo码迭代排序统计译码,获得译码处理结果。本发明实施例提供的Turbo码译码方法及设备可以提高译码性能增益。
Abstract:
復号結果の誤り率を低減し、かつ、回路規模も削減する復号装置を提供する。演算部は、復調データから、符号語の表し得る値の数より少ない数の符号語候補であって、送信される可能性のある符号語の符号語候補についてのみ複数の距離を演算する。復号部は、演算された複数の距離から符号語を復号する。本発明は、LTE(long term evolution)の復号装置に適用できる。