Abstract:
A system and method are provided for implementing a soft Reed-Solomon (RS) decoding scheme, technique or algorithm to improve physical layer performance in cable modems and cable gateways. At 1024-QAM, a receiver is provided in which a signal to noise ratio is reduced by at least about 1 dB relaxing design considerations and specifications for other components in the system including for the tuner. A soft-RS-symbol generation scheme is provided to enable soft-input RC decoding in a forward error correction (FEC) module connected to a QAM demodulator. The RS decoding scheme is implemented without significantly complicating hardware or processing overhead. A typical receiver hardware requirement in an FEC module to implement the disclosed scheme may be comparatively modest, e.g., on an order of approximately 50K gates.
Abstract:
A method and an apparatus for encoding and decoding packets using a polar code is provided. The method includes acquiring a plurality of blocks constituting the packet, extracting a plurality of codeword candidates corresponding to the blocks, selecting some of the codeword candidates in a descending order of posterior probability among the codeword candidates corresponding to the blocks, combining the selected codeword candidates into a plurality of codeword combinations, selecting a codeword combination having the highest posterior probability and passed Cyclic Redundancy Check (CRC) test without error among the pluralityof codeword combinations, and decoding the selected codeword combination. The packet encoding and decoding apparatus and method of the present disclosure is capable of encoding and decoding packets in a unit of blocks efficiently.
Abstract:
Certain embodiments of the present invention are efficient run-time methods for creating and updating a RAM list of dominant trapping-set profiles for use in (LDPC) list decoding. A decoded correct codeword is compared to a near codeword to generate a new trapping-set profile, and the profile written to RAM. Record is kept of how many times RAM has been searched since a profile was last matched. Profiles that have not been matched within a specified number of searches are purge-eligible. Purge-eligible profiles are further ranked on other factors, e.g., number of times a profile has been matched since it was added, number of unsatisfied check nodes, number of erroneous bit nodes. If there is insufficient free space in RAM to store a newly-discovered profile, then purge-eligible profiles are deleted, beginning with the lowest-ranked profiles, until either (i) sufficient free space is created or (ii) there are no more purge-eligible profiles.
Abstract:
The present invention describes a decoder arrangement and method for decoding an iteratively decodable code such as a turbo code or an LDPC code. The invention comprises a first iterative decoder having channel reliability metrics as input and arranged to provide a first estimated codeword as output and to store intermediate reliability metrics, a reload and modify unit arranged to reload reliability metrics of a best candidate iteration and modify the reloaded reliability metrics, and a subsequent iterative decoder having modified reliability metrics as input and arranged to provide a subsequent estimated codeword as output.
Abstract:
Systems and methods for decoding block and concatenated codes are provided, including improvements for decoding HD Radio signals. Initial channel state information estimation may be performed using distorted modulated symbols. Soft estimates of convolutional code coded bits may be produced using soft-input soft-output decoding. Improved channel state information may be generated by performing additional iterations of channel state information estimation using some of the soft estimates of the convolutional code coded bits. The improved channel state information may then be used to decode the HD radio signal. Other embodiments are provided, including enhanced decoding of reference subcarriers based on soft-diversity combining, joint enhanced channel state information estimation, as well as iterative soft-input soft-output and list decoding of convolutional codes and Reed-Solomon codes. These and other improvements enhance the decoding of different logical channels in HD Radio systems.
Abstract:
In one embodiment, an LDPC decoder has a controller and one or more check-node units (CNUs). The CNUs generate check-node messages using a scaled min-sum algorithm, an offset min-sum algorithm, or a scaled and offset min-sum algorithm. Initially, the controller selects a scaling factor and an offset value. The scaling factor may be set to one for no scaling, and the offset value may be set to zero for no offsetting. If the decoder is unable to correctly decode a codeword, then (i) the controller selects a new scaling and/or offset value and (ii) the decoder attempts to correctly decode the codeword using the new scaling and/or offset value. By changing the scaling factor and/or offset value, LDPC decoders of the present invention may be capable of improving error-floor characteristics over LDPC decoders that use only fixed or no scaling factors or fixed or no offsetting factors.
Abstract:
The invention relates to a method of processing binary errors in a binary frame emanating from a digital audio coder, comprising a step of receiving a current binary frame liable to comprise binary errors. According to the invention, the binary frame comprises sensitive bits to be protected which are catalogued in at least one category according to the type of parameter that they code and the method furthermore comprises the steps of receiving protection bits, of reading the sensitive bits received in the current binary frame, the number of sensitive bits being lower than the number of bits of the binary frame, of detecting binary errors as a function of said protection bits received and of said sensitive bits received and in the event of detecting at least one erroneous bit in said binary frame, of modifying the current binary frame before decoding, as a function of the category in which the erroneous bit is catalogued. The invention also pertains to a device implementing the method according to the invention as well as to a decoder and a coding/decoding system comprising such a device.
Abstract:
A method and apparatus for decoding a linear block encoded string of information bits comprising: converting the string into a plurality of codewords. Performing hard and soft decision on each codeword to generate a hard and soft decision vector. Computing the syndrome and finding the location of the two minimum values by Galois Field Arithmetic. Designating these values LOW1 and LOW2 and xoring with a Nc1, thus generating Nc2. Swapping Nc1 with Nc2 and determining the lowest soft decision value, Min1 and a next lowest value, Min2. The two bit locations creating Min1 are designated as MinA and MinB. MinA being replaced with Min2 minus the value MinA. MinB being replaced with Min2 minus the value at MinB. Generating an output codeword by subtracting Min1 from all other bit locations values and 2's complementing all soft values with 0 in their location. Creating the new soft value vector.
Abstract:
The invention concerns a decoding method with flexible input and flexible output of a linear block code word (s) of dimension k and length n, received from a transmission channel, comprising steps which consists in: generating a list of firm words ( u b) of the code close to the received code word ( s ), by coding a list of k-uplets obtained by firm approximation of the received word components and by changing the less reliable components; computing the j output flexible word component by difference between the generated closest word metrics, and the generated closest word having an opposite j component, or in default the generated least close code word. The invention also concerns an iterative method for decoding a product code word received on a transmission channel, using such decoding method with flexible input and flexible output. It enables quick and efficient decoding of a code product words, even if there is no algebraic decoder.
Abstract translation:本发明涉及一种从传输信道接收的尺寸k和长度为n的线性块码字(s)的灵活输入和灵活输出的解码方法,包括以下步骤:产生列表 通过对接收到的字的公式近似获得的k-uplet的列表进行编码,使得靠近所接收的代码字( s u>)的代码的公词(u u u b) 组件和改变不太可靠的组件; 通过生成的最近字度量之间的差异和产生的具有相反j分量的最近的字来计算第j个输出灵活词分量,或者默认地生成最小关键码字。 本发明还涉及使用具有灵活输入和灵活输出的这种解码方法来解码在传输信道上接收的产品码字的迭代方法。 即使没有代数解码器,它也可以快速高效地对代码产品字进行解码。